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arm64: dts: rockchip: Add frl-enable-gpios to rk3588s-roc-pc

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The board exposes the GPIO4_B2 line to control the voltage bias on the
HDMI0 data lines.  It must be asserted when operating in HDMI 2.1 FRL
mode and deasserted for HDMI 1.4/2.0 TMDS mode.

Wire up the hdmi0 node to its dedicated GPIO via frl-enable-gpios to
allow adjusting the bias when transitioning between TMDS and FRL modes.

While at it, move hym8563 down to fix the ordering of &pinctrl entries.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260428-dts-rk-frl-enable-gpios-v2-9-924df9db884a@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Cristian Ciocaltea 2026-04-28 00:57:27 +03:00 committed by Heiko Stuebner
parent 640c768d31
commit 0c58a27bf0
1 changed files with 13 additions and 3 deletions
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16
arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts
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@ -224,6 +224,10 @@ &gpu {
};
&hdmi0 {
frl-enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
&hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
pinctrl-names = "default";
status = "okay";
};
@ -367,9 +371,9 @@ &pd_gpu {
};
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
hdmi {
hdmi0_tx_on_h: hdmi0-tx-on-h {
rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@ -379,6 +383,12 @@ hp_detect: hp-detect {
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
led_pins: led-pins {
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,