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arm64: dts: rockchip: Add missing pinctrl-names to rk3588 boards

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Several rk3588 board DTS files override pinctrl-0 for i2c, i2s, pcie,
pwm, sdmmc, spdif, spi and uart nodes without re-specifying
pinctrl-names.  While the property is inherited from the base SoC DTSI,
add it explicitly to the board-level overrides for consistency with
other nodes.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://patch.msgid.link/20260428-dts-rk-frl-enable-gpios-v2-12-924df9db884a@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Cristian Ciocaltea 2026-04-28 00:57:30 +03:00 committed by Heiko Stuebner
parent 78f650c45e
commit 0c2c0b6cdd
24 changed files with 50 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts
View File

@ -788,6 +788,7 @@ &u2phy3_host {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-armsom-w3.dts
View File

@ -439,6 +439,7 @@ &sdio {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5-genbook.dts
View File

@ -335,6 +335,7 @@ pcie_wake: pcie-wake {
&pwm6 {
pinctrl-0 = <&pwm6m1_pins>;
pinctrl-names = "default";
status = "okay";
};

4
arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi
View File

@ -143,6 +143,7 @@ &gpu {
&i2c0 {
pinctrl-0 = <&i2c0m2_xfer>;
pinctrl-names = "default";
status = "okay";
vdd_cpu_big0_s0: regulator@42 {
@ -219,6 +220,7 @@ hym8563: rtc@51 {
&i2c7 {
pinctrl-0 = <&i2c7m0_xfer>;
pinctrl-names = "default";
status = "okay";
es8316: audio-codec@10 {
@ -244,6 +246,7 @@ &i2s0_mclk
&i2s0_sclk
&i2s0_sdi0
&i2s0_sdo0>;
pinctrl-names = "default";
status = "okay";
i2s0_8ch_p0: port {
@ -656,5 +659,6 @@ &tsadc {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi
View File

@ -252,6 +252,7 @@ &sdmmc {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
View File

@ -510,6 +510,7 @@ &i2s0_mclk
&i2s0_sclk
&i2s0_sdi0
&i2s0_sdo0>;
pinctrl-names = "default";
status = "okay";
};
@ -1386,6 +1387,7 @@ &u2phy3_host {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-evb2-v10.dts
View File

@ -921,6 +921,7 @@ &u2phy3_host {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-fet3588-c.dtsi
View File

@ -558,5 +558,6 @@ &tsadc {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-firefly-core-3588j.dtsi
View File

@ -443,5 +443,6 @@ regulator-state-mem {
/* rk3588 preferred debug out */
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-firefly-icore-3588q.dtsi
View File

@ -439,5 +439,6 @@ regulator-state-mem {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm64/boot/dts/rockchip/rk3588-firefly-itx-3588j.dts
View File

@ -568,11 +568,13 @@ &sata2 {
/* uart/232/485 */
&uart0 {
pinctrl-0 = <&uart0m2_xfer>;
pinctrl-names = "default";
status = "okay";
};
&uart1 {
pinctrl-0 = <&uart1m1_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts
View File

@ -784,6 +784,7 @@ &u2phy1_otg {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

8
arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
View File

@ -307,6 +307,7 @@ &hdptxphy0 {
&i2c0 {
pinctrl-0 = <&i2c0m2_xfer>;
pinctrl-names = "default";
status = "okay";
fan@18 {
@ -417,10 +418,12 @@ regulator-state-mem {
&i2c1 {
pinctrl-0 = <&i2c1m4_xfer>;
pinctrl-names = "default";
};
&i2c6 {
pinctrl-0 = <&i2c6m4_xfer>;
pinctrl-names = "default";
};
&i2c7 {
@ -439,6 +442,7 @@ eeprom@54 {
&i2c8 {
pinctrl-0 = <&i2c8m2_xfer>;
pinctrl-names = "default";
status = "okay";
typec-portc@22 {
@ -1054,18 +1058,21 @@ &u2phy3_host {
/* Mule-ATtiny debug UART; typically baudrate 9600 */
&uart0 {
pinctrl-0 = <&uart0m0_xfer>;
pinctrl-names = "default";
status = "okay";
};
/* Main debug interface on P20 micro-USB B port and P21 header */
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};
/* RS485 on P19 */
&uart3 {
pinctrl-0 = <&uart3m2_xfer &uart3_rtsn>;
pinctrl-names = "default";
linux,rs485-enabled-at-boot-time;
status = "okay";
};
@ -1073,6 +1080,7 @@ &uart3 {
/* Mule-ATtiny UPDI flashing UART */
&uart7 {
pinctrl-0 = <&uart7m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm64/boot/dts/rockchip/rk3588-mnt-reform2.dts
View File

@ -185,6 +185,7 @@ rgmii_phy: ethernet-phy@0 {
&pcie2x1l2 {
pinctrl-0 = <&pcie2_0_rst>;
pinctrl-names = "default";
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@ -236,6 +237,7 @@ eth_phy_reset: eth-phy-reset {
&pwm8 {
pinctrl-0 = <&pwm8m2_pins>;
pinctrl-names = "default";
status = "okay";
};

3
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
View File

@ -579,6 +579,7 @@ rt5616_p0_0: endpoint {
&i2c8 {
pinctrl-0 = <&i2c8m2_xfer>;
pinctrl-names = "default";
};
&i2s0_8ch {
@ -763,6 +764,7 @@ usbc0_int: usbc0-int {
&pwm1 {
pinctrl-0 = <&pwm1m1_pins>;
pinctrl-names = "default";
status = "okay";
};
@ -1174,6 +1176,7 @@ &tsadc {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
View File

@ -351,6 +351,7 @@ &pwm2 {
&pwm3 {
pinctrl-0 = <&pwm3m1_pins>;
pinctrl-names = "default";
status = "okay";
};
@ -369,6 +370,7 @@ &u2phy1_otg {
&uart9 {
pinctrl-0 = <&uart9m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi
View File

@ -822,6 +822,7 @@ &u2phy3_host {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-roc-rt.dts
View File

@ -1059,6 +1059,7 @@ &u2phy3_host {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
View File

@ -927,6 +927,7 @@ spi_flash: flash@0 {
&spdif_tx1 {
pinctrl-0 = <&spdif1m2_tx>;
pinctrl-names = "default";
status = "okay";
};
@ -1261,6 +1262,7 @@ &tsadc {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
View File

@ -975,6 +975,7 @@ &tsadc {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-tiger-haikou.dts
View File

@ -274,6 +274,7 @@ &sdmmc {
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
pinctrl-0 = <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>;
pinctrl-names = "default";
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;

9
arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
View File

@ -156,6 +156,7 @@ &hdmi0 {
&i2c1 {
pinctrl-0 = <&i2c1m0_xfer>;
pinctrl-names = "default";
};
&i2c1m0_xfer {
@ -168,6 +169,7 @@ &i2c1m0_xfer {
&i2c2 {
pinctrl-0 = <&i2c2m3_xfer>;
pinctrl-names = "default";
};
&i2c2m3_xfer {
@ -180,10 +182,12 @@ &i2c2m3_xfer {
&i2c3 {
pinctrl-0 = <&i2c3m0_xfer>;
pinctrl-names = "default";
};
&i2c4 {
pinctrl-0 = <&i2c4m4_xfer>;
pinctrl-names = "default";
status = "okay";
vdd_npu_s0: regulator@42 {
@ -205,6 +209,7 @@ regulator-state-mem {
&i2c5 {
pinctrl-0 = <&i2c5m1_xfer>;
pinctrl-names = "default";
};
&i2c5m1_xfer {
@ -302,6 +307,7 @@ &i2c7m0_xfer {
&i2c8 {
pinctrl-0 = <&i2c8m2_xfer>;
pinctrl-names = "default";
};
&mdio0 {
@ -441,6 +447,7 @@ &sdmmc {
&spi0 {
pinctrl-0 = <&spi0m1_cs0 &spi0m1_cs1 &spi0m3_pins>;
pinctrl-names = "default";
};
&spi2 {
@ -771,10 +778,12 @@ &tsadc {
/* Routed to UART0 on the Q7 connector */
&uart2 {
pinctrl-0 = <&uart2m2_xfer>;
pinctrl-names = "default";
};
/* Mule-ATtiny UPDI */
&uart4 {
pinctrl-0 = <&uart4m2_xfer>;
pinctrl-names = "default";
status = "okay";
};

1
arch/arm64/boot/dts/rockchip/rk3588-toybrick-x0.dts
View File

@ -675,6 +675,7 @@ &u2phy3_host {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};

2
arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi
View File

@ -704,11 +704,13 @@ &tsadc {
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
pinctrl-names = "default";
status = "okay";
};
&uart9 {
pinctrl-0 = <&uart9m0_xfer>;
pinctrl-names = "default";
status = "okay";
};