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KVM: selftests: Run the nested x2APIC with and without APICv being inhibited in L2
Signed-off-by: Sean Christopherson <seanjc@google.com> Message-ID: <20260813223610.2043560-4-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -15,6 +15,7 @@
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#define POSTED_INTR_WAKEUP_VECTOR 0xf1
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#define POSTED_INTR_NESTED_VECTOR 0xf0
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static bool inhibit_apicv;
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static volatile unsigned int nr_irqs;
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static void guest_irq_handler(struct ex_regs *regs)
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@ -25,7 +26,8 @@ static void guest_irq_handler(struct ex_regs *regs)
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static void l2_guest_code(void)
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{
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wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) & GENMASK_ULL(11, 0));
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if (inhibit_apicv)
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wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) & GENMASK_ULL(11, 0));
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asm volatile("cpuid" ::: "eax", "ebx", "ecx", "edx");
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}
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@ -78,20 +80,20 @@ static void l1_guest_code(void *test_data)
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GUEST_DONE();
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}
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int main(int argc, char *argv[])
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static void __test_x2apic_intercepts(void)
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{
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gva_t nested_test_data_gva;
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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struct ucall uc;
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TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_SVM) || kvm_cpu_has(X86_FEATURE_VMX));
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vm = vm_create_with_one_vcpu(&vcpu, l1_guest_code);
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vm_install_exception_handler(vm, POSTED_INTR_VECTOR, guest_irq_handler);
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vm_install_exception_handler(vm, POSTED_INTR_WAKEUP_VECTOR, guest_irq_handler);
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vm_install_exception_handler(vm, POSTED_INTR_NESTED_VECTOR, guest_irq_handler);
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sync_global_to_guest(vm, inhibit_apicv);
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if (kvm_cpu_has(X86_FEATURE_SVM))
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vcpu_alloc_svm(vm, &nested_test_data_gva);
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else
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@ -115,3 +117,18 @@ int main(int argc, char *argv[])
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kvm_vm_free(vm);
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}
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#define test_x2apic_intercepts(inhibit_apic_setting) \
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do { \
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inhibit_apic_setting; \
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\
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__test_x2apic_intercepts(); \
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} while (0)
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int main(int argc, char *argv[])
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{
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TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_SVM) || kvm_cpu_has(X86_FEATURE_VMX));
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test_x2apic_intercepts(inhibit_apicv = true);
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test_x2apic_intercepts(inhibit_apicv = false);
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}
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