mirror of
https://github.com/torvalds/linux.git
synced 2026-05-26 16:12:59 +02:00
RISC-V SpacemiT DT changes for 7.1
For K3 SoC - Add I2C support - Add PMIC regulator tree - Add ethernet support - Add pinctrl/GPIO/Clock - Enable full UART support For K1 SoC On Milk-V Jupiter - Enable PCIe/USB on - Enable QSPI/SPI NOR - Enable EEPROM, LEDs Others - Fix PMIC supply properties - Fix PCIe missing power regulator -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQKvBAABCgCZFiEEtbq4ycMbcRVnAiPcMarqR1lNu+0FAmnPsTYbFIAAAAAABAAO bWFudTIsMi41KzEuMTEsMiwyXxSAAAAAAC4AKGlzc3Vlci1mcHJAbm90YXRpb25z Lm9wZW5wZ3AuZmlmdGhob3JzZW1hbi5uZXRCNUJBQjhDOUMzMUI3MTE1NjcwMjIz REMzMUFBRUE0NzU5NERCQkVEAAoJEDGq6kdZTbvt9TsQAJAKQJ9rpVL7tRPCxkcE nM5txZGOY2NEcjIk/yuufaagXgD6NtoDSCz50T/TWHn3VSVxhZ/VFhIz7zCwJxq8 Kl4TVmUwlAZi5US4NY93lQyBs4haL8VcTWoGPPZGfbbxdPRQw5/vfAYo1w2g7WTa w5F8zVYWuc2/aYq46YXddZLHfUD5zSEchNAoYPHazJ2EyYyjAQoeEa3ZB34/pMUH YmjuF7hEwXNT0FZXmONXv6LI8t4avg20vGln7fsupOfhuq50/ODrQbBggm6fijZN jaWWL+FXixVzI9FivMAptRFZzMkF0Ti9kH0V4TFt0sJBmbQh6wHoB8XtIVn2loRf hGzurQ6AtwwEk1GZRr/lP2NTc99ZEJARX2hf2WKxGJTm+XiMXE8s4C7bEVgAcF7m gQjXqfOUeOh44+l4J6rV4B6+D8xg8ZQ2Z0NPh7FewYxv6LSVZjo5xC0ljNwWnKvO UkCFMie9Ecpt/qMnAfGb3xjV1zofSTpqnsBloKlintzK80k7+VnKajYo7Jw7MrI4 PVRENeLH3nIGso61qVc0HBkSKatzXlurZtLIl3wZk5WioftdzA81Gg0oV3YigCIK MSq1MZiBrUnIuGFtdSskmKcbWAGMaEkBJN4OVkFM+TjQw9t3PjpbYZnAoTlFEOwP ldbjXnK3ydzHJzQSbq/4Hs/S =wej0 -----END PGP SIGNATURE----- Merge tag 'spacemit-dt-for-7.1-1' of https://github.com/spacemit-com/linux into soc/dt RISC-V SpacemiT DT changes for 7.1 For K3 SoC - Add I2C support - Add PMIC regulator tree - Add ethernet support - Add pinctrl/GPIO/Clock - Enable full UART support For K1 SoC On Milk-V Jupiter - Enable PCIe/USB on - Enable QSPI/SPI NOR - Enable EEPROM, LEDs Others - Fix PMIC supply properties - Fix PCIe missing power regulator * tag 'spacemit-dt-for-7.1-1' of https://github.com/spacemit-com/linux: dts: riscv: spacemit: k3: add P1 PMIC regulator tree dts: riscv: spacemit: k3: Add i2c nodes riscv: dts: spacemit: enable PCIe ports on Milk-V Jupiter riscv: dts: spacemit: enable USB 3 ports on Milk-V Jupiter riscv: dts: spacemit: enable QSPI and add SPI NOR on Milk-V Jupiter riscv: dts: spacemit: add i2c aliases on Milk-V Jupiter riscv: dts: spacemit: add 24c04 eeprom on Milk-V Jupiter riscv: dts: spacemit: add LEDs for Milk-V Jupiter board riscv: dts: spacemit: Add ethernet device for K3 riscv: dts: spacemit: drop incorrect pinctrl for combo PHY riscv: dts: spacemit: reorder phy nodes for K1 riscv: dts: spacemit: k3: add full resource to UART riscv: dts: spacemit: k3: add GPIO support riscv: dts: spacemit: k3: add pinctrl support riscv: dts: spacemit: k3: add clock tree dt-bindings: serial: 8250: spacemit: fix clock property for K3 SoC riscv: dts: spacemit: Add 'linux,pci-domain' to PCIe nodes for K1 riscv: dts: spacemit: adapt regulator node name to preferred form riscv: dts: spacemit: Update PMIC supply properties for BPI-F3 and Jupiter riscv: dts: spacemit: pcie: fix missing power regulator Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Linus Walleij
commit
0ba8e918c7
|
|
@ -63,7 +63,9 @@ allOf:
|
|||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: spacemit,k1-uart
|
||||
enum:
|
||||
- spacemit,k1-uart
|
||||
- spacemit,k3-uart
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
|
|
@ -76,6 +78,7 @@ allOf:
|
|||
contains:
|
||||
enum:
|
||||
- spacemit,k1-uart
|
||||
- spacemit,k3-uart
|
||||
- nxp,lpc1850-uart
|
||||
then:
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ led1 {
|
|||
};
|
||||
};
|
||||
|
||||
pcie_vcc_3v3: pcie-vcc3v3 {
|
||||
pcie_vcc_3v3: regulator-pcie-vcc3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "PCIE_VCC3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
|
|
@ -41,7 +41,7 @@ pcie_vcc_3v3: pcie-vcc3v3 {
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_dc_in: dc-in-12v {
|
||||
reg_dc_in: regulator-dc-in-12v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dc_in_12v";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
|
|
@ -50,7 +50,7 @@ reg_dc_in: dc-in-12v {
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vcc_4v: vcc-4v {
|
||||
reg_vcc_4v: regulator-vcc-4v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_4v";
|
||||
regulator-min-microvolt = <4000000>;
|
||||
|
|
@ -60,7 +60,7 @@ reg_vcc_4v: vcc-4v {
|
|||
vin-supply = <®_dc_in>;
|
||||
};
|
||||
|
||||
usb3-vbus-5v {
|
||||
regulator-usb3-vbus-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "USB30_VBUS";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
|
|
@ -70,7 +70,7 @@ usb3-vbus-5v {
|
|||
enable-active-high;
|
||||
};
|
||||
|
||||
usb3_hub_5v: usb3-hub-5v {
|
||||
usb3_hub_5v: regulator-usb3-hub-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "USB30_HUB";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
|
|
@ -81,8 +81,6 @@ usb3_hub_5v: usb3-hub-5v {
|
|||
};
|
||||
|
||||
&combo_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie0_3_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
@ -190,7 +188,15 @@ pmic@41 {
|
|||
compatible = "spacemit,p1";
|
||||
reg = <0x41>;
|
||||
interrupts = <64>;
|
||||
vin-supply = <®_vcc_4v>;
|
||||
vin1-supply = <®_vcc_4v>;
|
||||
vin2-supply = <®_vcc_4v>;
|
||||
vin3-supply = <®_vcc_4v>;
|
||||
vin4-supply = <®_vcc_4v>;
|
||||
vin5-supply = <®_vcc_4v>;
|
||||
vin6-supply = <®_vcc_4v>;
|
||||
aldoin-supply = <®_vcc_4v>;
|
||||
dldoin1-supply = <&buck5>;
|
||||
dldoin2-supply = <&buck5>;
|
||||
|
||||
regulators {
|
||||
buck1 {
|
||||
|
|
@ -221,7 +227,7 @@ buck4 {
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck5 {
|
||||
buck5: buck5 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
|
|
@ -305,6 +311,7 @@ &pcie1_phy {
|
|||
|
||||
&pcie1_port {
|
||||
phys = <&pcie1_phy>;
|
||||
vpcie3v3-supply = <&pcie_vcc_3v3>;
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
|
|
@ -320,6 +327,7 @@ &pcie2_phy {
|
|||
|
||||
&pcie2_port {
|
||||
phys = <&pcie2_phy>;
|
||||
vpcie3v3-supply = <&pcie_vcc_3v3>;
|
||||
};
|
||||
|
||||
&pcie2 {
|
||||
|
|
|
|||
|
|
@ -15,13 +15,42 @@ aliases {
|
|||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
serial0 = &uart0;
|
||||
i2c2 = &i2c2;
|
||||
i2c8 = &i2c8;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0";
|
||||
};
|
||||
|
||||
reg_dc_in: dc-in-12v {
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led1 {
|
||||
label = "pwr-led";
|
||||
gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "default-on";
|
||||
default-state = "on";
|
||||
};
|
||||
|
||||
led2 {
|
||||
label = "hdd-led";
|
||||
gpios = <&gpio K1_GPIO(92) GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "disk-activity";
|
||||
};
|
||||
};
|
||||
|
||||
pcie_vcc_3v3: regulator-pcie-vcc3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pcie_vcc3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
vin-supply = <®_dc_in>;
|
||||
};
|
||||
|
||||
reg_dc_in: regulator-dc-in-12v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dc_in_12v";
|
||||
regulator-min-microvolt = <12000000>;
|
||||
|
|
@ -30,7 +59,7 @@ reg_dc_in: dc-in-12v {
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_vcc_4v: vcc-4v {
|
||||
reg_vcc_4v: regulator-vcc-4v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_4v";
|
||||
regulator-min-microvolt = <4000000>;
|
||||
|
|
@ -39,6 +68,41 @@ reg_vcc_4v: vcc-4v {
|
|||
regulator-always-on;
|
||||
vin-supply = <®_dc_in>;
|
||||
};
|
||||
|
||||
reg_vcc_5v: regulator-vcc-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_5v";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
vin-supply = <®_dc_in>;
|
||||
};
|
||||
|
||||
regulator-usb3-vbus-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "USB30_VBUS";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
vin-supply = <®_vcc_5v>;
|
||||
gpio = <&gpio K1_GPIO(97) GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
usb3_hub_5v: regulator-usb3-hub-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "USB30_HUB";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <®_vcc_5v>;
|
||||
gpio = <&gpio K1_GPIO(123) GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&combo_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
|
|
@ -91,6 +155,28 @@ &pdma {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2_0_cfg>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x50>;
|
||||
vcc-supply = <&buck3_1v8>; /* EEPROM_VCC18 */
|
||||
pagesize = <16>;
|
||||
read-only;
|
||||
size = <512>;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "onie,tlv-layout";
|
||||
|
||||
product-name {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
pinctrl-0 = <&i2c8_cfg>;
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -100,7 +186,15 @@ pmic@41 {
|
|||
compatible = "spacemit,p1";
|
||||
reg = <0x41>;
|
||||
interrupts = <64>;
|
||||
vin-supply = <®_vcc_4v>;
|
||||
vin1-supply = <®_vcc_4v>;
|
||||
vin2-supply = <®_vcc_4v>;
|
||||
vin3-supply = <®_vcc_4v>;
|
||||
vin4-supply = <®_vcc_4v>;
|
||||
vin5-supply = <®_vcc_4v>;
|
||||
vin6-supply = <®_vcc_4v>;
|
||||
aldoin-supply = <®_vcc_4v>;
|
||||
dldoin1-supply = <&buck5>;
|
||||
dldoin2-supply = <&buck5>;
|
||||
|
||||
regulators {
|
||||
buck1 {
|
||||
|
|
@ -124,14 +218,14 @@ buck3_1v8: buck3 {
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck4 {
|
||||
buck4_3v3: buck4 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck5 {
|
||||
buck5: buck5 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
|
|
@ -207,8 +301,108 @@ dldo7 {
|
|||
};
|
||||
};
|
||||
|
||||
&pcie1_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie1_3_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1_port {
|
||||
phys = <&pcie1_phy>;
|
||||
vpcie3v3-supply = <&pcie_vcc_3v3>;
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
vpcie3v3-supply = <&pcie_vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie2_4_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2_port {
|
||||
phys = <&pcie2_phy>;
|
||||
vpcie3v3-supply = <&pcie_vcc_3v3>;
|
||||
};
|
||||
|
||||
&pcie2 {
|
||||
vpcie3v3-supply = <&pcie_vcc_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&qspi_cfg>;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <26500000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
vcc-supply = <&buck4_3v3>; /* QSPI_VCC1833 */
|
||||
m25p,fast-read;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bootinfo@0 {
|
||||
reg = <0x0 0x10000>;
|
||||
};
|
||||
private@10000 {
|
||||
reg = <0x10000 0x10000>;
|
||||
};
|
||||
fsbl@20000 {
|
||||
reg = <0x20000 0x40000>;
|
||||
};
|
||||
env@60000 {
|
||||
reg = <0x60000 0x10000>;
|
||||
};
|
||||
opensbi@70000 {
|
||||
reg = <0x70000 0x30000>;
|
||||
};
|
||||
uboot@a00000 {
|
||||
reg = <0xa0000 0x760000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_2_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_dwc3 {
|
||||
dr_mode = "host";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
hub_2_0: hub@1 {
|
||||
compatible = "usb2109,2817";
|
||||
reg = <0x1>;
|
||||
vdd-supply = <&usb3_hub_5v>;
|
||||
peer-hub = <&hub_3_0>;
|
||||
reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
hub_3_0: hub@2 {
|
||||
compatible = "usb2109,817";
|
||||
reg = <0x2>;
|
||||
vdd-supply = <&usb3_hub_5v>;
|
||||
peer-hub = <&hub_2_0>;
|
||||
reset-gpios = <&gpio K1_GPIO(124) GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -359,6 +359,60 @@ syscon_rcpu2: system-controller@c0888000 {
|
|||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
usbphy2: phy@c0a30000 {
|
||||
compatible = "spacemit,k1-usb2-phy";
|
||||
reg = <0x0 0xc0a30000 0x0 0x200>;
|
||||
clocks = <&syscon_apmu CLK_USB30>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
combo_phy: phy@c0b10000 {
|
||||
compatible = "spacemit,k1-combo-phy";
|
||||
reg = <0x0 0xc0b10000 0x0 0x1000>;
|
||||
clocks = <&vctcxo_24m>,
|
||||
<&syscon_apmu CLK_PCIE0_DBI>,
|
||||
<&syscon_apmu CLK_PCIE0_MASTER>,
|
||||
<&syscon_apmu CLK_PCIE0_SLAVE>;
|
||||
clock-names = "refclk",
|
||||
"dbi",
|
||||
"mstr",
|
||||
"slv";
|
||||
resets = <&syscon_apmu RESET_PCIE0_GLOBAL>,
|
||||
<&syscon_apmu RESET_PCIE0_DBI>,
|
||||
<&syscon_apmu RESET_PCIE0_MASTER>,
|
||||
<&syscon_apmu RESET_PCIE0_SLAVE>;
|
||||
reset-names = "phy",
|
||||
"dbi",
|
||||
"mstr",
|
||||
"slv";
|
||||
#phy-cells = <1>;
|
||||
spacemit,apmu = <&syscon_apmu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie1_phy: phy@c0c10000 {
|
||||
compatible = "spacemit,k1-pcie-phy";
|
||||
reg = <0x0 0xc0c10000 0x0 0x1000>;
|
||||
clocks = <&vctcxo_24m>;
|
||||
clock-names = "refclk";
|
||||
resets = <&syscon_apmu RESET_PCIE1_GLOBAL>;
|
||||
reset-names = "phy";
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie2_phy: phy@c0d10000 {
|
||||
compatible = "spacemit,k1-pcie-phy";
|
||||
reg = <0x0 0xc0d10000 0x0 0x1000>;
|
||||
clocks = <&vctcxo_24m>;
|
||||
clock-names = "refclk";
|
||||
resets = <&syscon_apmu RESET_PCIE2_GLOBAL>;
|
||||
reset-names = "phy";
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@d4010800 {
|
||||
compatible = "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4010800 0x0 0x38>;
|
||||
|
|
@ -429,60 +483,6 @@ i2c5: i2c@d4013800 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy2: phy@c0a30000 {
|
||||
compatible = "spacemit,k1-usb2-phy";
|
||||
reg = <0x0 0xc0a30000 0x0 0x200>;
|
||||
clocks = <&syscon_apmu CLK_USB30>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
combo_phy: phy@c0b10000 {
|
||||
compatible = "spacemit,k1-combo-phy";
|
||||
reg = <0x0 0xc0b10000 0x0 0x1000>;
|
||||
clocks = <&vctcxo_24m>,
|
||||
<&syscon_apmu CLK_PCIE0_DBI>,
|
||||
<&syscon_apmu CLK_PCIE0_MASTER>,
|
||||
<&syscon_apmu CLK_PCIE0_SLAVE>;
|
||||
clock-names = "refclk",
|
||||
"dbi",
|
||||
"mstr",
|
||||
"slv";
|
||||
resets = <&syscon_apmu RESET_PCIE0_GLOBAL>,
|
||||
<&syscon_apmu RESET_PCIE0_DBI>,
|
||||
<&syscon_apmu RESET_PCIE0_MASTER>,
|
||||
<&syscon_apmu RESET_PCIE0_SLAVE>;
|
||||
reset-names = "phy",
|
||||
"dbi",
|
||||
"mstr",
|
||||
"slv";
|
||||
#phy-cells = <1>;
|
||||
spacemit,apmu = <&syscon_apmu>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie1_phy: phy@c0c10000 {
|
||||
compatible = "spacemit,k1-pcie-phy";
|
||||
reg = <0x0 0xc0c10000 0x0 0x1000>;
|
||||
clocks = <&vctcxo_24m>;
|
||||
clock-names = "refclk";
|
||||
resets = <&syscon_apmu RESET_PCIE1_GLOBAL>;
|
||||
reset-names = "phy";
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie2_phy: phy@c0d10000 {
|
||||
compatible = "spacemit,k1-pcie-phy";
|
||||
reg = <0x0 0xc0d10000 0x0 0x1000>;
|
||||
clocks = <&vctcxo_24m>;
|
||||
clock-names = "refclk";
|
||||
resets = <&syscon_apmu RESET_PCIE2_GLOBAL>;
|
||||
reset-names = "phy";
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
syscon_apbc: system-controller@d4015000 {
|
||||
compatible = "spacemit,k1-syscon-apbc";
|
||||
reg = <0x0 0xd4015000 0x0 0x1000>;
|
||||
|
|
@ -1033,6 +1033,7 @@ pcie-bus {
|
|||
#size-cells = <2>;
|
||||
dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>,
|
||||
<0x0 0xb8000000 0x1 0x38000000 0x3 0x48000000>;
|
||||
|
||||
pcie0: pcie@ca000000 {
|
||||
device_type = "pci";
|
||||
compatible = "spacemit,k1-pcie";
|
||||
|
|
@ -1044,6 +1045,7 @@ pcie0: pcie@ca000000 {
|
|||
"atu",
|
||||
"config",
|
||||
"link";
|
||||
linux,pci-domain = <0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x8f002000 0x0 0x00100000>,
|
||||
|
|
@ -1087,6 +1089,7 @@ pcie1: pcie@ca400000 {
|
|||
"atu",
|
||||
"config",
|
||||
"link";
|
||||
linux,pci-domain = <1>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0x9f002000 0x0 0x00100000>,
|
||||
|
|
@ -1130,6 +1133,7 @@ pcie2: pcie@ca800000 {
|
|||
"atu",
|
||||
"config",
|
||||
"link";
|
||||
linux,pci-domain = <2>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
ranges = <0x01000000 0x0 0x00000000 0x0 0xb7002000 0x0 0x00100000>,
|
||||
|
|
|
|||
|
|
@ -3,14 +3,17 @@
|
|||
* Copyright (c) 2026 SpacemiT (Hangzhou) Technology Co. Ltd
|
||||
* Copyright (c) 2026 Guodong Xu <guodong@riscstar.com>
|
||||
*/
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
#include "k3.dtsi"
|
||||
#include "k3-pinctrl.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SpacemiT K3 Pico-ITX";
|
||||
compatible = "spacemit,k3-pico-itx", "spacemit,k3";
|
||||
|
||||
aliases {
|
||||
ethernet0 = ð0;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
|
|
@ -22,8 +25,175 @@ memory@100000000 {
|
|||
device_type = "memory";
|
||||
reg = <0x1 0x00000000 0x4 0x00000000>;
|
||||
};
|
||||
|
||||
reg_aux_vcc5v: regulator-aux-vcc5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "AUX_VCC5V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c8_cfg>;
|
||||
status = "okay";
|
||||
|
||||
p1@41 {
|
||||
compatible = "spacemit,p1";
|
||||
reg = <0x41>;
|
||||
interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
vin1-supply = <®_aux_vcc5v>;
|
||||
vin2-supply = <®_aux_vcc5v>;
|
||||
vin3-supply = <®_aux_vcc5v>;
|
||||
vin4-supply = <®_aux_vcc5v>;
|
||||
vin5-supply = <®_aux_vcc5v>;
|
||||
vin6-supply = <®_aux_vcc5v>;
|
||||
aldoin-supply = <®_aux_vcc5v>;
|
||||
dldoin1-supply = <&buck4>;
|
||||
dldoin2-supply = <&buck4>;
|
||||
|
||||
regulators {
|
||||
buck1: buck1 {
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2: buck2 {
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck3: buck3 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck4: buck4 {
|
||||
regulator-min-microvolt = <2100000>;
|
||||
regulator-max-microvolt = <2100000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck5: buck5 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck6: buck6 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <500000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
aldo1: aldo1 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
aldo2: aldo2 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
aldo3: aldo3 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
aldo4: aldo4 {
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo1: dldo1 {
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo2: dldo2 {
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo3: dldo3 {
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo4: dldo4 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo5: dldo5 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo6: dldo6 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo7: dldo7 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_rgmii_0_cfg>, <&gmac0_phy_0_cfg>;
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <&phy0>;
|
||||
status = "okay";
|
||||
|
||||
mdio {
|
||||
phy0: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_0_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
69
arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
Normal file
69
arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
Normal file
|
|
@ -0,0 +1,69 @@
|
|||
// SPDX-License-Identifier: GPL-2.0 OR MIT
|
||||
/*
|
||||
* Copyright (c) 2026 Yixun Lan <dlan@kernel.org>
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
#define K3_PADCONF(pin, func) (((pin) << 16) | (func))
|
||||
|
||||
/* Map GPIO pin to each bank's <index, offset> */
|
||||
#define K3_GPIO(x) (x / 32) (x % 32)
|
||||
|
||||
&pinctrl {
|
||||
gmac0_rgmii_0_cfg: gmac0-rgmii-0-cfg {
|
||||
gmac0-rgmii-0-pins {
|
||||
pinmux = <K3_PADCONF(0, 1)>, /* gmac0_rxdv */
|
||||
<K3_PADCONF(1, 1)>, /* gmac0_rx_d0 */
|
||||
<K3_PADCONF(2, 1)>, /* gmac0_rx_d1 */
|
||||
<K3_PADCONF(3, 1)>, /* gmac0_rx_clk */
|
||||
<K3_PADCONF(4, 1)>, /* gmac0_rx_d2 */
|
||||
<K3_PADCONF(5, 1)>, /* gmac0_rx_d3 */
|
||||
<K3_PADCONF(6, 1)>, /* gmac0_tx_d0 */
|
||||
<K3_PADCONF(7, 1)>, /* gmac0_tx_d1 */
|
||||
<K3_PADCONF(8, 1)>, /* gmac0_tx_clk */
|
||||
<K3_PADCONF(9, 1)>, /* gmac0_tx_d2 */
|
||||
<K3_PADCONF(10, 1)>, /* gmac0_tx_d3 */
|
||||
<K3_PADCONF(11, 1)>, /* gmac0_tx_en */
|
||||
<K3_PADCONF(12, 1)>, /* gmac0_mdc */
|
||||
<K3_PADCONF(13, 1)>; /* gmac0_mdio */
|
||||
|
||||
bias-disable;
|
||||
drive-strength = <25>;
|
||||
power-source = <1800>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
gmac0_phy_0_cfg: gmac0-phy-0-cfg {
|
||||
gmac0-phy-0-pins {
|
||||
pinmux = <K3_PADCONF(14, 1)>; /* gmac0_int */
|
||||
|
||||
bias-disable;
|
||||
drive-strength = <25>;
|
||||
power-source = <1800>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2c8_cfg: i2c8-cfg {
|
||||
i2c8-pins {
|
||||
pinmux = <K3_PADCONF(128, 0)>, /* i2c8 scl */
|
||||
<K3_PADCONF(129, 0)>; /* i2c8 sda */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <25>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart0_0_cfg: uart0-0-cfg {
|
||||
uart0-0-pins {
|
||||
pinmux = <K3_PADCONF(149, 2)>, /* uart0 tx */
|
||||
<K3_PADCONF(150, 2)>; /* uart0 rx */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <25>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4,6 +4,8 @@
|
|||
* Copyright (c) 2026 Guodong Xu <guodong@riscstar.com>
|
||||
*/
|
||||
|
||||
#include <dt-bindings/clock/spacemit,k3-clocks.h>
|
||||
#include <dt-bindings/reset/spacemit,k3-resets.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/dts-v1/;
|
||||
|
|
@ -398,6 +400,36 @@ core3 {
|
|||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
vctcxo_1m: clock-1m {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <1000000>;
|
||||
clock-output-names = "vctcxo_1m";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
vctcxo_24m: clock-24m {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
clock-output-names = "vctcxo_24m";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
vctcxo_3m: clock-3m {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <3000000>;
|
||||
clock-output-names = "vctcxo_3m";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
osc_32k: clock-32k {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <32000>;
|
||||
clock-output-names = "osc_32k";
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc {
|
||||
compatible = "simple-bus";
|
||||
interrupt-parent = <&saplic>;
|
||||
|
|
@ -406,12 +438,211 @@ soc: soc {
|
|||
dma-noncoherent;
|
||||
ranges;
|
||||
|
||||
eth0: ethernet@cac80000 {
|
||||
compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
|
||||
reg = <0x0 0xcac80000 0x0 0x2000>;
|
||||
clocks = <&syscon_apmu CLK_APMU_EMAC0_BUS>,
|
||||
<&syscon_apmu CLK_APMU_EMAC0_1588>,
|
||||
<&syscon_apmu CLK_APMU_EMAC0_RGMII_TX>;
|
||||
clock-names = "stmmaceth", "ptp_ref", "tx";
|
||||
interrupts = <131 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<276 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq", "eth_wake_irq";
|
||||
resets = <&syscon_apmu RESET_APMU_EMAC0>;
|
||||
reset-names = "stmmaceth";
|
||||
rx-fifo-depth = <8192>;
|
||||
tx-fifo-depth = <8192>;
|
||||
snps,multicast-filter-bins = <64>;
|
||||
snps,perfect-filter-entries = <32>;
|
||||
snps,aal;
|
||||
snps,tso;
|
||||
snps,txpbl = <8>;
|
||||
snps,rxpbl = <8>;
|
||||
snps,force_sf_dma_mode;
|
||||
snps,axi-config = <&gmac0_axi_setup>;
|
||||
spacemit,apmu = <&syscon_apmu 0x3e4 0x3e8>;
|
||||
status = "disabled";
|
||||
|
||||
mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
gmac0_axi_setup: stmmac-axi-config {
|
||||
snps,wr_osr_lmt = <0xf>;
|
||||
snps,rd_osr_lmt = <0xf>;
|
||||
/* max axi burst len is 256 */
|
||||
snps,blen = <256 128 64 32 16 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
eth1: ethernet@cac82000 {
|
||||
compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
|
||||
reg = <0x0 0xcac82000 0x0 0x2000>;
|
||||
clocks = <&syscon_apmu CLK_APMU_EMAC1_BUS>,
|
||||
<&syscon_apmu CLK_APMU_EMAC1_1588>,
|
||||
<&syscon_apmu CLK_APMU_EMAC1_RGMII_TX>;
|
||||
clock-names = "stmmaceth", "ptp_ref", "tx";
|
||||
interrupts = <133 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<277 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq", "eth_wake_irq";
|
||||
resets = <&syscon_apmu RESET_APMU_EMAC1>;
|
||||
reset-names = "stmmaceth";
|
||||
rx-fifo-depth = <8192>;
|
||||
tx-fifo-depth = <8192>;
|
||||
snps,multicast-filter-bins = <64>;
|
||||
snps,perfect-filter-entries = <32>;
|
||||
snps,aal;
|
||||
snps,tso;
|
||||
snps,txpbl = <8>;
|
||||
snps,rxpbl = <8>;
|
||||
snps,force_sf_dma_mode;
|
||||
snps,axi-config = <&gmac1_axi_setup>;
|
||||
spacemit,apmu = <&syscon_apmu 0x3ec 0x3f0>;
|
||||
status = "disabled";
|
||||
|
||||
mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
gmac1_axi_setup: stmmac-axi-config {
|
||||
snps,wr_osr_lmt = <0xf>;
|
||||
snps,rd_osr_lmt = <0xf>;
|
||||
/* max axi burst len is 256 */
|
||||
snps,blen = <256 128 64 32 16 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
eth2: ethernet@cac8e000 {
|
||||
compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
|
||||
reg = <0x0 0xcac8e000 0x0 0x2000>;
|
||||
clocks = <&syscon_apmu CLK_APMU_EMAC2_BUS>,
|
||||
<&syscon_apmu CLK_APMU_EMAC2_1588>,
|
||||
<&syscon_apmu CLK_APMU_EMAC2_RGMII_TX>;
|
||||
clock-names = "stmmaceth", "ptp_ref", "tx";
|
||||
interrupts = <130 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<278 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq", "eth_wake_irq";
|
||||
resets = <&syscon_apmu RESET_APMU_EMAC2>;
|
||||
reset-names = "stmmaceth";
|
||||
rx-fifo-depth = <4096>;
|
||||
tx-fifo-depth = <4096>;
|
||||
snps,multicast-filter-bins = <64>;
|
||||
snps,perfect-filter-entries = <32>;
|
||||
snps,aal;
|
||||
snps,tso;
|
||||
snps,txpbl = <8>;
|
||||
snps,rxpbl = <8>;
|
||||
snps,force_sf_dma_mode;
|
||||
snps,axi-config = <&gmac2_axi_setup>;
|
||||
spacemit,apmu = <&syscon_apmu 0x248 0x24c>;
|
||||
status = "disabled";
|
||||
|
||||
mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
gmac2_axi_setup: stmmac-axi-config {
|
||||
snps,wr_osr_lmt = <0xf>;
|
||||
snps,rd_osr_lmt = <0xf>;
|
||||
/* max axi burst len is 256 */
|
||||
snps,blen = <256 128 64 32 16 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0: i2c@d4010800 {
|
||||
compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4010800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon_apbc CLK_APBC_TWSI0>,
|
||||
<&syscon_apbc CLK_APBC_TWSI0_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
resets = <&syscon_apbc RESET_APBC_TWSI0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@d4011000 {
|
||||
compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4011000 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon_apbc CLK_APBC_TWSI1>,
|
||||
<&syscon_apbc CLK_APBC_TWSI1_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
resets = <&syscon_apbc RESET_APBC_TWSI1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@d4012000 {
|
||||
compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4012000 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon_apbc CLK_APBC_TWSI2>,
|
||||
<&syscon_apbc CLK_APBC_TWSI2_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
resets = <&syscon_apbc RESET_APBC_TWSI2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c@d4012800 {
|
||||
compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4012800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon_apbc CLK_APBC_TWSI4>,
|
||||
<&syscon_apbc CLK_APBC_TWSI4_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
resets = <&syscon_apbc RESET_APBC_TWSI4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c5: i2c@d4013800 {
|
||||
compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4013800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon_apbc CLK_APBC_TWSI5>,
|
||||
<&syscon_apbc CLK_APBC_TWSI5_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
resets = <&syscon_apbc RESET_APBC_TWSI5>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
syscon_apbc: system-controller@d4015000 {
|
||||
compatible = "spacemit,k3-syscon-apbc";
|
||||
reg = <0x0 0xd4015000 0x0 0x1000>;
|
||||
clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>, <&vctcxo_24m>;
|
||||
clock-names = "osc", "vctcxo_1m", "vctcxo_3m", "vctcxo_24m";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
uart0: serial@d4017000 {
|
||||
compatible = "spacemit,k3-uart", "intel,xscale-uart";
|
||||
reg = <0x0 0xd4017000 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART0>,
|
||||
<&syscon_apbc CLK_APBC_UART0_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART0>;
|
||||
interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -421,7 +652,10 @@ uart2: serial@d4017100 {
|
|||
reg = <0x0 0xd4017100 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART2>,
|
||||
<&syscon_apbc CLK_APBC_UART2_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART2>;
|
||||
interrupts = <44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -431,7 +665,10 @@ uart3: serial@d4017200 {
|
|||
reg = <0x0 0xd4017200 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART3>,
|
||||
<&syscon_apbc CLK_APBC_UART3_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART3>;
|
||||
interrupts = <45 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -441,7 +678,10 @@ uart4: serial@d4017300 {
|
|||
reg = <0x0 0xd4017300 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART4>,
|
||||
<&syscon_apbc CLK_APBC_UART4_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART4>;
|
||||
interrupts = <46 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -451,7 +691,10 @@ uart5: serial@d4017400 {
|
|||
reg = <0x0 0xd4017400 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART5>,
|
||||
<&syscon_apbc CLK_APBC_UART5_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART5>;
|
||||
interrupts = <47 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -461,7 +704,10 @@ uart6: serial@d4017500 {
|
|||
reg = <0x0 0xd4017500 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART6>,
|
||||
<&syscon_apbc CLK_APBC_UART6_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART6>;
|
||||
interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -471,7 +717,10 @@ uart7: serial@d4017600 {
|
|||
reg = <0x0 0xd4017600 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART7>,
|
||||
<&syscon_apbc CLK_APBC_UART7_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART7>;
|
||||
interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -481,7 +730,10 @@ uart8: serial@d4017700 {
|
|||
reg = <0x0 0xd4017700 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART8>,
|
||||
<&syscon_apbc CLK_APBC_UART8_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART8>;
|
||||
interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -491,21 +743,116 @@ uart9: serial@d4017800 {
|
|||
reg = <0x0 0xd4017800 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART9>,
|
||||
<&syscon_apbc CLK_APBC_UART9_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART9>;
|
||||
interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c6: i2c@d4018800 {
|
||||
compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd4018800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <70 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon_apbc CLK_APBC_TWSI6>,
|
||||
<&syscon_apbc CLK_APBC_TWSI6_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
resets = <&syscon_apbc RESET_APBC_TWSI6>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio: gpio@d4019000 {
|
||||
compatible = "spacemit,k3-gpio";
|
||||
reg = <0x0 0xd4019000 0x0 0x100>;
|
||||
clocks = <&syscon_apbc CLK_APBC_GPIO>,
|
||||
<&syscon_apbc CLK_APBC_GPIO_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
gpio-controller;
|
||||
#gpio-cells = <3>;
|
||||
interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&saplic>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
gpio-ranges = <&pinctrl 0 0 0 32>,
|
||||
<&pinctrl 1 0 32 32>,
|
||||
<&pinctrl 2 0 64 32>,
|
||||
<&pinctrl 3 0 96 32>;
|
||||
};
|
||||
|
||||
i2c8: i2c@d401d800 {
|
||||
compatible = "spacemit,k3-i2c", "spacemit,k1-i2c";
|
||||
reg = <0x0 0xd401d800 0x0 0x38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&syscon_apbc CLK_APBC_TWSI8>,
|
||||
<&syscon_apbc CLK_APBC_TWSI8_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
clock-frequency = <400000>;
|
||||
resets = <&syscon_apbc RESET_APBC_TWSI8>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl: pinctrl@d401e000 {
|
||||
compatible = "spacemit,k3-pinctrl";
|
||||
reg = <0x0 0xd401e000 0x0 0x1000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_AIB>,
|
||||
<&syscon_apbc CLK_APBC_AIB_BUS>;
|
||||
clock-names = "func", "bus";
|
||||
};
|
||||
|
||||
uart10: serial@d401f000 {
|
||||
compatible = "spacemit,k3-uart", "intel,xscale-uart";
|
||||
reg = <0x0 0xd401f000 0x0 0x100>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <14700000>;
|
||||
clocks = <&syscon_apbc CLK_APBC_UART10>,
|
||||
<&syscon_apbc CLK_APBC_UART10_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_UART10>;
|
||||
interrupts = <281 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
syscon_mpmu: system-controller@d4050000 {
|
||||
compatible = "spacemit,k3-syscon-mpmu";
|
||||
reg = <0x0 0xd4050000 0x0 0x10000>;
|
||||
clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>, <&vctcxo_24m>;
|
||||
clock-names = "osc", "vctcxo_1m", "vctcxo_3m", "vctcxo_24m";
|
||||
#clock-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
pll: clock-controller@d4090000 {
|
||||
compatible = "spacemit,k3-pll";
|
||||
reg = <0x0 0xd4090000 0x0 0x10000>;
|
||||
clocks = <&vctcxo_24m>;
|
||||
spacemit,mpmu = <&syscon_mpmu>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
syscon_apmu: system-controller@d4282800 {
|
||||
compatible = "spacemit,k3-syscon-apmu";
|
||||
reg = <0x0 0xd4282800 0x0 0x400>;
|
||||
clocks = <&osc_32k>, <&vctcxo_1m>, <&vctcxo_3m>, <&vctcxo_24m>;
|
||||
clock-names = "osc", "vctcxo_1m", "vctcxo_3m", "vctcxo_24m";
|
||||
#clock-cells = <1>;
|
||||
#power-domain-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
syscon_dciu: system-controller@d8440000 {
|
||||
compatible = "spacemit,k3-syscon-dciu";
|
||||
reg = <0x0 0xd8440000 0x0 0xc000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
simsic: interrupt-controller@e0400000 {
|
||||
compatible = "spacemit,k3-imsics", "riscv,imsics";
|
||||
reg = <0x0 0xe0400000 0x0 0x200000>;
|
||||
|
|
@ -545,6 +892,8 @@ clint: timer@e081c000 {
|
|||
<&cpu7_intc 3>, <&cpu7_intc 7>;
|
||||
};
|
||||
|
||||
/* sec_i2c3: 0xf0614000, not available from Linux */
|
||||
|
||||
mimsic: interrupt-controller@f1000000 {
|
||||
compatible = "spacemit,k3-imsics", "riscv,imsics";
|
||||
reg = <0x0 0xf1000000 0x0 0x10000>;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user