mirror of
https://github.com/torvalds/linux.git
synced 2026-09-23 05:04:02 +02:00
RISC-V SpacemiT DT changes for 7.3
For K3 SoC - Enable SD card support - Enable QSPI - Fix reset delay of ETH PHY - Fix PHY ID of ETH - Symbolic PDAM ID - Add SPI controller support - Add USB and PHY support - Add I2S nodes For K1 SoC - Symbolic PDAM ID - Enable cpufreq support - Fix max CPU core voltage For boards of K3 - Pico-ITX - Enable ALDPS on RTL8211F PHY - Disable 125MHz clock on RTL8211F PHY - Enable NOR flash - Add EEPROM support - CoM260 - Add EEPROM support For boards of K1 - Milk-V Jupiter - Enable CPU DVFS - Banana Pi BPI-CM6 - Add initial support - OrangePi R2S - Enable PCIe -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQKvBAABCgCZFiEEtbq4ycMbcRVnAiPcMarqR1lNu+0FAmpupawbFIAAAAAABAAO bWFudTIsMi41KzEuMTIsMiwyXxSAAAAAAC4AKGlzc3Vlci1mcHJAbm90YXRpb25z Lm9wZW5wZ3AuZmlmdGhob3JzZW1hbi5uZXRCNUJBQjhDOUMzMUI3MTE1NjcwMjIz REMzMUFBRUE0NzU5NERCQkVEAAoJEDGq6kdZTbvtuDgP/0+IIPDo/U7U0IhT+dAx Mxr1fWX1M4h5nEmirD8Zsx8TSfvZrpZr5MvazjrHxZ5U2U4ntkqrcoByhIqEy6Dn wz3A8arOEe3BU1zXf4UAPAW0CZA3Bp9rEDgwbgsTfyelSLyeDqaMX8l/8XQLU8Sl f28L5p+5AQota4Cutl36yE/KP6cK+7SBSgXA2Rnb9SXzvwC9cQGuOUq71zUsS7jI FdpYcvyCbLFmUiq2XoeFAdGB04nYs28VWiFnHg7FNdrCqWH6pgi/zxd3QtlTxjd6 oIrp/NsBnx9WAyx9GDhckpqOLt+sA49BjMTArBHmytVBI0ku2kbueQXJIS2J2OEq Cj4jkMD36Mbk21UP/3OOohARxPYWDDsRQ6NzvAMqNnmFdGa2lTCGA2pBsXF6pzYA cgFoSQq3s37ArNWaFxeCgnAnzyUWtEUEA3wcp+04xh4s9a90khxuU/rpF+GuyZwp 5Bfppy9L9dI6BogmfAcMsVHcLd0UhDoC6nokx8QLCtrVKEnpvWHfAtWProzEINfX k9K+f+fLtvL4aWGevKfZZfbMwFRrDaARI03HqW/flUjLBVggoC2FFo63WOfEmvZr ldCmIWM2iDgr7gBTSy8FSX+3FNROyc2xDFhM189crVvK0+LCCMyqGhHFNnk6NYbU NRf7S+rwIN9yrBSUgrX6GCXs =WKqT -----END PGP SIGNATURE----- Merge tag 'spacemit-dt-for-7.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux into soc/dt RISC-V SpacemiT DT changes for 7.3 For K3 SoC - Enable SD card support - Enable QSPI - Fix reset delay of ETH PHY - Fix PHY ID of ETH - Symbolic PDAM ID - Add SPI controller support - Add USB and PHY support - Add I2S nodes For K1 SoC - Symbolic PDAM ID - Enable cpufreq support - Fix max CPU core voltage For boards of K3 - Pico-ITX - Enable ALDPS on RTL8211F PHY - Disable 125MHz clock on RTL8211F PHY - Enable NOR flash - Add EEPROM support - CoM260 - Add EEPROM support For boards of K1 - Milk-V Jupiter - Enable CPU DVFS - Banana Pi BPI-CM6 - Add initial support - OrangePi R2S - Enable PCIe * tag 'spacemit-dt-for-7.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux: (33 commits) riscv: dts: spacemit: Add cpu scaling for Milk-V Jupiter riscv: dts: spacemit: k1-bananapi-cm6: fix maximum CPU core voltage riscv: dts: spacemit: k1-orangepi-r2s: fix maximum CPU core voltage riscv: dts: spacemit: k1-musepi-pro: fix maximum CPU core voltage riscv: dts: spacemit: k1-orangepi-rv2: fix maximum CPU core voltage riscv: dts: spacemit: k1-milkv-jupiter: fix maximum CPU core voltage riscv: dts: spacemit: k1-bananapi-f3: fix maximum CPU core voltage riscv: dts: spacemit: Make dtschema recognize the etherent PHY correctly on K3 com260 board riscv: dts: spacemit: Make dtschema recognize the etherent PHY correctly on K3 pico-itx board riscv: dts: spacemit: k3: add i2s0-i2s5 nodes riscv: dts: spacemit: k3: add USB controller and USB phy support riscv: dts: spacemit: enable PCIe on OrangePi R2S riscv: dts: spacemit: k3-com260-ifx: add eeprom on i2c1 riscv: dts: spacemit: k3-com260: add eeprom on i2c2 riscv: dts: spacemit: add SPI controllers for K3 riscv: dts: spacemit: add K3 PDMA request numbers riscv: dts: spacemit: Fix phy id check for the phy on com260 board riscv: dts: spacemit: Fix phy id check for the phy on pico-itx board riscv: dts: spacemit: Add enough deassert time for the PHY on com260 board riscv: dts: spacemit: Add enough deassert time for the PHY on PICO ITX ... Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Alexandre Belloni
commit
0b02b8f941
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@ -19,6 +19,11 @@ properties:
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const: '/'
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compatible:
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oneOf:
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- items:
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- enum:
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- bananapi,bpi-cm6-io
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- const: bananapi,bpi-cm6
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- const: spacemit,k1
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- items:
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- enum:
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- bananapi,bpi-f3
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@ -1,4 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_SPACEMIT) += k1-bananapi-cm6-io.dtb
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dtb-$(CONFIG_ARCH_SPACEMIT) += k1-bananapi-f3.dtb
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dtb-$(CONFIG_ARCH_SPACEMIT) += k1-milkv-jupiter.dtb
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dtb-$(CONFIG_ARCH_SPACEMIT) += k1-musepi-pro.dtb
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177
arch/riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts
Normal file
177
arch/riscv/boot/dts/spacemit/k1-bananapi-cm6-io.dts
Normal file
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@ -0,0 +1,177 @@
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// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright (C) 2026 Junhui Liu <junhui.liu@pigmoral.tech>
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*/
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#include "k1-bananapi-cm6.dtsi"
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Banana Pi BPI-CM6 IO Board";
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compatible = "bananapi,bpi-cm6-io", "bananapi,bpi-cm6", "spacemit,k1";
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aliases {
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ethernet0 = ð0;
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ethernet1 = ð1;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led0 {
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_LOW>;
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};
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led1 {
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio K1_GPIO(97) GPIO_ACTIVE_LOW>;
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};
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};
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pcie_vcc_3v3: regulator-pcie-vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "NGFF_KEYM_VDD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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usb_vbus_5v: regulator-usb-vbus-5v {
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compatible = "regulator-fixed";
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regulator-name = "VBUS_A_B";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio K1_GPIO(124) GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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sd_vcc_3v3: regulator-sd-vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3.3VS_CARD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio K1_GPIO(127) GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&combo_phy {
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status = "okay";
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};
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ð0 {
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status = "okay";
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};
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ð1 {
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nvmem-cells = <&mac_address 1>;
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nvmem-cell-names = "mac-address";
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phy-handle = <&rgmii1>;
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phy-mode = "rgmii-id";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1_cfg>;
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <250>;
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status = "okay";
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mdio-bus {
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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reset-gpios = <&gpio K1_GPIO(46) GPIO_ACTIVE_LOW>;
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reset-delay-us = <10000>;
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reset-post-delay-us = <100000>;
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rgmii1: phy@1 {
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reg = <0x1>;
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};
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};
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};
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&i2c2 {
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eeprom@54 {
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compatible = "atmel,24c08";
|
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reg = <0x54>;
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vcc-supply = <&buck3_1v8>;
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pagesize = <16>;
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size = <1024>;
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};
|
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};
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&pcie1_phy {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie1_3_cfg>;
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status = "okay";
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};
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&pcie1_port {
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phys = <&pcie1_phy>;
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vpcie3v3-supply = <&pcie_vcc_3v3>;
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};
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&pcie1 {
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status = "okay";
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};
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&pcie2_phy {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_4_cfg>;
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status = "okay";
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};
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&pcie2_port {
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phys = <&pcie2_phy>;
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vpcie3v3-supply = <&pcie_vcc_3v3>;
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};
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&pcie2 {
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status = "okay";
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};
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&qspi {
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pinctrl-names = "default";
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pinctrl-0 = <&qspi_cfg>;
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status = "okay";
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};
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&sdhci0 {
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pinctrl-names = "default", "uhs";
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pinctrl-0 = <&mmc1_cfg>;
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pinctrl-1 = <&mmc1_uhs_cfg>;
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bus-width = <4>;
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cd-gpios = <&gpio K1_GPIO(80) (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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no-mmc;
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no-sdio;
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disable-wp;
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cap-sd-highspeed;
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vmmc-supply = <&sd_vcc_3v3>;
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vqmmc-supply = <&aldo1>;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_2_cfg>;
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status = "okay";
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};
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&usbphy2 {
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status = "okay";
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};
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&usb_dwc3 {
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dr_mode = "host";
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vbus-supply = <&usb_vbus_5v>;
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status = "okay";
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};
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217
arch/riscv/boot/dts/spacemit/k1-bananapi-cm6.dtsi
Normal file
217
arch/riscv/boot/dts/spacemit/k1-bananapi-cm6.dtsi
Normal file
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@ -0,0 +1,217 @@
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|||
// SPDX-License-Identifier: GPL-2.0 OR MIT
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||||
/*
|
||||
* Copyright (C) 2026 Junhui Liu <junhui.liu@pigmoral.tech>
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*/
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#include "k1.dtsi"
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#include "k1-pinctrl.dtsi"
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/ {
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model = "Banana Pi BPI-CM6 Module";
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compatible = "bananapi,bpi-cm6", "spacemit,k1";
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||||
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aliases {
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i2c2 = &i2c2;
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i2c8 = &i2c8;
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};
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||||
reg_vcc_4v: regulator-vcc-4v {
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compatible = "regulator-fixed";
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regulator-name = "VCC4V0_SYS";
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regulator-min-microvolt = <4000000>;
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regulator-max-microvolt = <4000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&emmc {
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bus-width = <8>;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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non-removable;
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no-sd;
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no-sdio;
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status = "okay";
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};
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ð0 {
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nvmem-cells = <&mac_address 0>;
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nvmem-cell-names = "mac-address";
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phy-handle = <&rgmii0>;
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phy-mode = "rgmii-id";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_cfg>;
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <0>;
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mdio-bus {
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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||||
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reset-gpios = <&gpio K1_GPIO(45) GPIO_ACTIVE_LOW>;
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reset-delay-us = <10000>;
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||||
reset-post-delay-us = <100000>;
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||||
rgmii0: phy@1 {
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reg = <0x1>;
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};
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||||
};
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||||
};
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||||
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||||
&pdma {
|
||||
status = "okay";
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||||
};
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||||
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||||
&i2c2 {
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pinctrl-names = "default";
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||||
pinctrl-0 = <&i2c2_0_cfg>;
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||||
status = "okay";
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||||
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||||
eeprom@50 {
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||||
compatible = "atmel,24c02";
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reg = <0x50>;
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vcc-supply = <&buck3_1v8>;
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pagesize = <16>;
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read-only;
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size = <256>;
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nvmem-layout {
|
||||
compatible = "onie,tlv-layout";
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mac_address: mac-address {
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#nvmem-cell-cells = <1>;
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||||
};
|
||||
|
||||
num-macs {
|
||||
};
|
||||
|
||||
serial-number {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c8_cfg>;
|
||||
status = "okay";
|
||||
|
||||
pmic@41 {
|
||||
compatible = "spacemit,p1";
|
||||
reg = <0x41>;
|
||||
interrupts = <64>;
|
||||
vin1-supply = <®_vcc_4v>;
|
||||
vin2-supply = <®_vcc_4v>;
|
||||
vin3-supply = <®_vcc_4v>;
|
||||
vin4-supply = <®_vcc_4v>;
|
||||
vin5-supply = <®_vcc_4v>;
|
||||
vin6-supply = <®_vcc_4v>;
|
||||
aldoin-supply = <®_vcc_4v>;
|
||||
dldoin1-supply = <&buck5>;
|
||||
dldoin2-supply = <&buck5>;
|
||||
|
||||
regulators {
|
||||
buck1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck3_1v8: buck3 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck4 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck5: buck5 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck6 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
aldo1: aldo1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
aldo2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
aldo3 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
aldo4 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
dldo1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
dldo2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
dldo3 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
dldo4 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dldo5 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
|
||||
dldo6 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dldo7 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -4,6 +4,7 @@
|
|||
*/
|
||||
|
||||
#include "k1.dtsi"
|
||||
#include "k1-opp.dtsi"
|
||||
#include "k1-pinctrl.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
@ -87,6 +88,38 @@ &combo_phy {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu_0 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_1 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_2 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_3 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_4 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_5 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_6 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_7 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
mmc-hs400-1_8v;
|
||||
|
|
@ -101,7 +134,7 @@ ð0 {
|
|||
phy-handle = <&rgmii0>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_cfg>;
|
||||
pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
status = "okay";
|
||||
|
|
@ -124,7 +157,7 @@ ð1 {
|
|||
phy-handle = <&rgmii1>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac1_cfg>;
|
||||
pinctrl-0 = <&gmac1_cfg>, <&gmac1_clk_ref_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <250>;
|
||||
status = "okay";
|
||||
|
|
@ -202,16 +235,16 @@ pmic@41 {
|
|||
dldoin2-supply = <&buck5>;
|
||||
|
||||
regulators {
|
||||
buck1 {
|
||||
buck1_0v9: buck1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
*/
|
||||
|
||||
#include "k1.dtsi"
|
||||
#include "k1-opp.dtsi"
|
||||
#include "k1-pinctrl.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
@ -107,6 +108,38 @@ &combo_phy {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu_0 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_1 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_2 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_3 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_4 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_5 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_6 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&cpu_7 {
|
||||
cpu-supply = <&buck1_0v9>;
|
||||
};
|
||||
|
||||
&emmc {
|
||||
bus-width = <8>;
|
||||
mmc-hs400-1_8v;
|
||||
|
|
@ -121,7 +154,7 @@ ð0 {
|
|||
phy-handle = <&rgmii0>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_cfg>;
|
||||
pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
status = "okay";
|
||||
|
|
@ -144,7 +177,7 @@ ð1 {
|
|||
phy-handle = <&rgmii1>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac1_cfg>;
|
||||
pinctrl-0 = <&gmac1_cfg>, <&gmac1_clk_ref_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <250>;
|
||||
status = "okay";
|
||||
|
|
@ -209,16 +242,16 @@ pmic@41 {
|
|||
dldoin2-supply = <&buck5>;
|
||||
|
||||
regulators {
|
||||
buck1 {
|
||||
buck1_0v9: buck1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ &combo_phy {
|
|||
ð0 {
|
||||
phy-handle = <&rgmii0>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-0 = <&gmac0_cfg>;
|
||||
pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
|
||||
pinctrl-names = "default";
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
|
|
@ -180,14 +180,14 @@ pmic@41 {
|
|||
regulators {
|
||||
buck1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
|||
105
arch/riscv/boot/dts/spacemit/k1-opp.dtsi
Normal file
105
arch/riscv/boot/dts/spacemit/k1-opp.dtsi
Normal file
|
|
@ -0,0 +1,105 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/ {
|
||||
cluster0_opp_table: opp-table-cluster0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-614400000 {
|
||||
opp-hz = /bits/ 64 <614400000>;
|
||||
opp-microvolt = <950000 950000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
|
||||
opp-819000000 {
|
||||
opp-hz = /bits/ 64 <819000000>;
|
||||
opp-microvolt = <950000 950000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
|
||||
opp-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <950000 950000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
|
||||
opp-1228800000 {
|
||||
opp-hz = /bits/ 64 <1228800000>;
|
||||
opp-microvolt = <950000 950000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
|
||||
opp-1600000000 {
|
||||
opp-hz = /bits/ 64 <1600000000>;
|
||||
opp-microvolt = <1050000 1050000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
};
|
||||
|
||||
cluster1_opp_table: opp-table-cluster1 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-614400000 {
|
||||
opp-hz = /bits/ 64 <614400000>;
|
||||
opp-microvolt = <950000 950000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
|
||||
opp-819000000 {
|
||||
opp-hz = /bits/ 64 <819000000>;
|
||||
opp-microvolt = <950000 950000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
|
||||
opp-1000000000 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <950000 950000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
|
||||
opp-1228800000 {
|
||||
opp-hz = /bits/ 64 <1228800000>;
|
||||
opp-microvolt = <950000 950000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
|
||||
opp-1600000000 {
|
||||
opp-hz = /bits/ 64 <1600000000>;
|
||||
opp-microvolt = <1050000 1050000 1050000>;
|
||||
clock-latency-ns = <200000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cpu_0 {
|
||||
operating-points-v2 = <&cluster0_opp_table>;
|
||||
};
|
||||
|
||||
&cpu_1 {
|
||||
operating-points-v2 = <&cluster0_opp_table>;
|
||||
};
|
||||
|
||||
&cpu_2 {
|
||||
operating-points-v2 = <&cluster0_opp_table>;
|
||||
};
|
||||
|
||||
&cpu_3 {
|
||||
operating-points-v2 = <&cluster0_opp_table>;
|
||||
};
|
||||
|
||||
&cpu_4 {
|
||||
operating-points-v2 = <&cluster1_opp_table>;
|
||||
};
|
||||
|
||||
&cpu_5 {
|
||||
operating-points-v2 = <&cluster1_opp_table>;
|
||||
};
|
||||
|
||||
&cpu_6 {
|
||||
operating-points-v2 = <&cluster1_opp_table>;
|
||||
};
|
||||
|
||||
&cpu_7 {
|
||||
operating-points-v2 = <&cluster1_opp_table>;
|
||||
};
|
||||
|
|
@ -23,6 +23,14 @@ chosen {
|
|||
stdout-path = "serial0";
|
||||
};
|
||||
|
||||
pcie_vcc3v3: regulator-pcie-vcc3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pcie_vcc3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vcc4v0: regulator-vcc4v0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc4v0";
|
||||
|
|
@ -60,7 +68,7 @@ ð0 {
|
|||
phy-handle = <&rgmii0>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_cfg>;
|
||||
pinctrl-0 = <&gmac0_cfg>, <&gmac0_clk_ref_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <0>;
|
||||
status = "okay";
|
||||
|
|
@ -84,7 +92,7 @@ ð1 {
|
|||
phy-handle = <&rgmii1>;
|
||||
phy-mode = "rgmii-id";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac1_cfg>;
|
||||
pinctrl-0 = <&gmac1_cfg>, <&gmac1_clk_ref_cfg>;
|
||||
rx-internal-delay-ps = <0>;
|
||||
tx-internal-delay-ps = <250>;
|
||||
status = "okay";
|
||||
|
|
@ -126,14 +134,14 @@ pmic@41 {
|
|||
regulators {
|
||||
buck1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
@ -228,6 +236,36 @@ dldo7 {
|
|||
};
|
||||
};
|
||||
|
||||
&pcie1_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie1_3_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1_port {
|
||||
phys = <&pcie1_phy>;
|
||||
vpcie3v3-supply = <&pcie_vcc3v3>;
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie2_4_cfg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2_port {
|
||||
phys = <&pcie2_phy>;
|
||||
vpcie3v3-supply = <&pcie_vcc3v3>;
|
||||
};
|
||||
|
||||
&pcie2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pdma {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -164,14 +164,14 @@ pmic@41 {
|
|||
regulators {
|
||||
buck1 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck2 {
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <3450000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <5000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
|||
56
arch/riscv/boot/dts/spacemit/k1-pdma.h
Normal file
56
arch/riscv/boot/dts/spacemit/k1-pdma.h
Normal file
|
|
@ -0,0 +1,56 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
||||
/*
|
||||
* DMA request number (DRQ) definitions for non-secure peripherals of
|
||||
* the SpacemiT K1 PDMA.
|
||||
*
|
||||
* Copyright (c) 2026 Guodong Xu <docular.xu@gmail.com>
|
||||
*/
|
||||
|
||||
#ifndef _DTS_SPACEMIT_K1_PDMA_H
|
||||
#define _DTS_SPACEMIT_K1_PDMA_H
|
||||
|
||||
#define K1_PDMA_UART0_TX 3
|
||||
#define K1_PDMA_UART0_RX 4
|
||||
#define K1_PDMA_UART2_TX 5
|
||||
#define K1_PDMA_UART2_RX 6
|
||||
#define K1_PDMA_UART3_TX 7
|
||||
#define K1_PDMA_UART3_RX 8
|
||||
#define K1_PDMA_UART4_TX 9
|
||||
#define K1_PDMA_UART4_RX 10
|
||||
#define K1_PDMA_I2C0_TX 11
|
||||
#define K1_PDMA_I2C0_RX 12
|
||||
#define K1_PDMA_I2C1_TX 13
|
||||
#define K1_PDMA_I2C1_RX 14
|
||||
#define K1_PDMA_I2C2_TX 15
|
||||
#define K1_PDMA_I2C2_RX 16
|
||||
#define K1_PDMA_I2C4_TX 17
|
||||
#define K1_PDMA_I2C4_RX 18
|
||||
#define K1_PDMA_SPI3_TX 19
|
||||
#define K1_PDMA_SPI3_RX 20
|
||||
#define K1_PDMA_I2S0_TX 21
|
||||
#define K1_PDMA_I2S0_RX 22
|
||||
#define K1_PDMA_I2S1_TX 23
|
||||
#define K1_PDMA_I2S1_RX 24
|
||||
#define K1_PDMA_UART5_TX 25
|
||||
#define K1_PDMA_UART5_RX 26
|
||||
#define K1_PDMA_UART6_TX 27
|
||||
#define K1_PDMA_UART6_RX 28
|
||||
#define K1_PDMA_UART7_TX 29
|
||||
#define K1_PDMA_UART7_RX 30
|
||||
#define K1_PDMA_UART8_TX 31
|
||||
#define K1_PDMA_UART8_RX 32
|
||||
#define K1_PDMA_UART9_TX 33
|
||||
#define K1_PDMA_UART9_RX 34
|
||||
#define K1_PDMA_I2C5_TX 35
|
||||
#define K1_PDMA_I2C5_RX 36
|
||||
#define K1_PDMA_I2C6_TX 37
|
||||
#define K1_PDMA_I2C6_RX 38
|
||||
#define K1_PDMA_I2C7_TX 39
|
||||
#define K1_PDMA_I2C7_RX 40
|
||||
#define K1_PDMA_I2C8_TX 41
|
||||
#define K1_PDMA_I2C8_RX 42
|
||||
#define K1_PDMA_CAN0_RX 43
|
||||
#define K1_PDMA_QSPI_RX 44
|
||||
#define K1_PDMA_QSPI_TX 45
|
||||
|
||||
#endif /* _DTS_SPACEMIT_K1_PDMA_H */
|
||||
|
|
@ -27,8 +27,16 @@ gmac0-pins {
|
|||
<K1_PADCONF(11, 1)>, /* gmac0_tx_en */
|
||||
<K1_PADCONF(12, 1)>, /* gmac0_mdc */
|
||||
<K1_PADCONF(13, 1)>, /* gmac0_mdio */
|
||||
<K1_PADCONF(14, 1)>, /* gmac0_int_n */
|
||||
<K1_PADCONF(45, 1)>; /* gmac0_clk_ref */
|
||||
<K1_PADCONF(14, 1)>; /* gmac0_int_n */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <21>;
|
||||
};
|
||||
};
|
||||
|
||||
gmac0_clk_ref_cfg: gmac0-clk-ref-cfg {
|
||||
gmac0-clk-ref-pins {
|
||||
pinmux = <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <21>;
|
||||
|
|
@ -51,8 +59,16 @@ gmac1-pins {
|
|||
<K1_PADCONF(40, 1)>, /* gmac1_tx_en */
|
||||
<K1_PADCONF(41, 1)>, /* gmac1_mdc */
|
||||
<K1_PADCONF(42, 1)>, /* gmac1_mdio */
|
||||
<K1_PADCONF(43, 1)>, /* gmac1_int_n */
|
||||
<K1_PADCONF(46, 1)>; /* gmac1_clk_ref */
|
||||
<K1_PADCONF(43, 1)>; /* gmac1_int_n */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <21>;
|
||||
};
|
||||
};
|
||||
|
||||
gmac1_clk_ref_cfg: gmac1-clk-ref-cfg {
|
||||
gmac1-clk-ref-pins {
|
||||
pinmux = <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <21>;
|
||||
|
|
|
|||
|
|
@ -6,6 +6,8 @@
|
|||
#include <dt-bindings/clock/spacemit,k1-syscon.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
|
||||
#include "k1-pdma.h"
|
||||
|
||||
/dts-v1/;
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
|
|
@ -54,6 +56,7 @@ cpu_0: cpu@0 {
|
|||
compatible = "spacemit,x60", "riscv";
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
clocks = <&syscon_apmu CLK_CPU_C0_CORE>;
|
||||
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
|
||||
|
|
@ -84,6 +87,7 @@ cpu_1: cpu@1 {
|
|||
compatible = "spacemit,x60", "riscv";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
clocks = <&syscon_apmu CLK_CPU_C0_CORE>;
|
||||
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
|
||||
|
|
@ -114,6 +118,7 @@ cpu_2: cpu@2 {
|
|||
compatible = "spacemit,x60", "riscv";
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
clocks = <&syscon_apmu CLK_CPU_C0_CORE>;
|
||||
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
|
||||
|
|
@ -144,6 +149,7 @@ cpu_3: cpu@3 {
|
|||
compatible = "spacemit,x60", "riscv";
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
clocks = <&syscon_apmu CLK_CPU_C0_CORE>;
|
||||
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
|
||||
|
|
@ -174,6 +180,7 @@ cpu_4: cpu@4 {
|
|||
compatible = "spacemit,x60", "riscv";
|
||||
device_type = "cpu";
|
||||
reg = <4>;
|
||||
clocks = <&syscon_apmu CLK_CPU_C1_CORE>;
|
||||
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
|
||||
|
|
@ -204,6 +211,7 @@ cpu_5: cpu@5 {
|
|||
compatible = "spacemit,x60", "riscv";
|
||||
device_type = "cpu";
|
||||
reg = <5>;
|
||||
clocks = <&syscon_apmu CLK_CPU_C1_CORE>;
|
||||
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
|
||||
|
|
@ -234,6 +242,7 @@ cpu_6: cpu@6 {
|
|||
compatible = "spacemit,x60", "riscv";
|
||||
device_type = "cpu";
|
||||
reg = <6>;
|
||||
clocks = <&syscon_apmu CLK_CPU_C1_CORE>;
|
||||
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
|
||||
|
|
@ -264,6 +273,7 @@ cpu_7: cpu@7 {
|
|||
compatible = "spacemit,x60", "riscv";
|
||||
device_type = "cpu";
|
||||
reg = <7>;
|
||||
clocks = <&syscon_apmu CLK_CPU_C1_CORE>;
|
||||
riscv,isa = "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt";
|
||||
riscv,isa-base = "rv64i";
|
||||
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b", "v", "zicbom",
|
||||
|
|
@ -1094,7 +1104,7 @@ spi3: spi@d401c000 {
|
|||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_SSP3>;
|
||||
interrupts = <55>;
|
||||
dmas = <&pdma 20>, <&pdma 19>;
|
||||
dmas = <&pdma K1_PDMA_SPI3_RX>, <&pdma K1_PDMA_SPI3_TX>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -19,3 +19,36 @@ chosen {
|
|||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_1_cfg>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
pagesize = <8>;
|
||||
reg = <0x50>;
|
||||
read-only;
|
||||
size = <256>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
pinctrl-names = "default","uhs";
|
||||
pinctrl-0 = <&mmc1_cfg>;
|
||||
pinctrl-1 = <&mmc1_uhs_cfg>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio K3_GPIO(4) GPIO_ACTIVE_HIGH>;
|
||||
no-mmc;
|
||||
no-sdio;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
vmmc-supply = <&aldo4>;
|
||||
vqmmc-supply = <&aldo1>;
|
||||
sd-uhs-sdr25;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -26,6 +26,38 @@ reg_5v_sys: regulator-5v-sys {
|
|||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_1_cfg>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
pagesize = <8>;
|
||||
reg = <0x50>;
|
||||
read-only;
|
||||
size = <256>;
|
||||
status = "okay";
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "onie,tlv-layout";
|
||||
|
||||
mac-address {
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
|
||||
num-macs {
|
||||
};
|
||||
|
||||
product-name {
|
||||
};
|
||||
|
||||
serial-number {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c8_cfg>;
|
||||
|
|
@ -173,12 +205,12 @@ ð1 {
|
|||
status = "okay";
|
||||
|
||||
mdio {
|
||||
phy1: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
phy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id001c.c916";
|
||||
reg = <1>;
|
||||
reset-gpios = <&gpio 1 5 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <10000>;
|
||||
reset-deassert-us = <50000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
83
arch/riscv/boot/dts/spacemit/k3-pdma.h
Normal file
83
arch/riscv/boot/dts/spacemit/k3-pdma.h
Normal file
|
|
@ -0,0 +1,83 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
|
||||
/*
|
||||
* DMA request number (DRQ) definitions for non-secure peripherals of
|
||||
* the SpacemiT K3 PDMA.
|
||||
*
|
||||
* Copyright (c) 2025 SpacemiT
|
||||
* Copyright (c) 2026 Guodong Xu <docular.xu@gmail.com>
|
||||
*/
|
||||
|
||||
#ifndef _DTS_SPACEMIT_K3_PDMA_H
|
||||
#define _DTS_SPACEMIT_K3_PDMA_H
|
||||
|
||||
/* UART DMA request numbers */
|
||||
#define K3_PDMA_UART0_TX 3
|
||||
#define K3_PDMA_UART0_RX 4
|
||||
#define K3_PDMA_UART2_TX 5
|
||||
#define K3_PDMA_UART2_RX 6
|
||||
#define K3_PDMA_UART3_TX 7
|
||||
#define K3_PDMA_UART3_RX 8
|
||||
#define K3_PDMA_UART4_TX 9
|
||||
#define K3_PDMA_UART4_RX 10
|
||||
#define K3_PDMA_UART5_TX 25
|
||||
#define K3_PDMA_UART5_RX 26
|
||||
#define K3_PDMA_UART6_TX 27
|
||||
#define K3_PDMA_UART6_RX 28
|
||||
#define K3_PDMA_UART7_TX 29
|
||||
#define K3_PDMA_UART7_RX 30
|
||||
#define K3_PDMA_UART8_TX 31
|
||||
#define K3_PDMA_UART8_RX 32
|
||||
#define K3_PDMA_UART9_TX 33
|
||||
#define K3_PDMA_UART9_RX 34
|
||||
#define K3_PDMA_UART10_TX 53
|
||||
#define K3_PDMA_UART10_RX 54
|
||||
|
||||
/* I2C DMA request numbers */
|
||||
#define K3_PDMA_I2C0_TX 11
|
||||
#define K3_PDMA_I2C0_RX 12
|
||||
#define K3_PDMA_I2C1_TX 13
|
||||
#define K3_PDMA_I2C1_RX 14
|
||||
#define K3_PDMA_I2C2_TX 15
|
||||
#define K3_PDMA_I2C2_RX 16
|
||||
#define K3_PDMA_I2C4_TX 17
|
||||
#define K3_PDMA_I2C4_RX 18
|
||||
#define K3_PDMA_I2C5_TX 35
|
||||
#define K3_PDMA_I2C5_RX 36
|
||||
#define K3_PDMA_I2C6_TX 37
|
||||
#define K3_PDMA_I2C6_RX 38
|
||||
#define K3_PDMA_I2C8_TX 41
|
||||
#define K3_PDMA_I2C8_RX 42
|
||||
|
||||
/* SSP/SPI DMA request numbers */
|
||||
#define K3_PDMA_SSP3_TX 19
|
||||
#define K3_PDMA_SSP3_RX 20
|
||||
#define K3_PDMA_SSPA0_TX 21
|
||||
#define K3_PDMA_SSPA0_RX 22
|
||||
#define K3_PDMA_SSPA1_TX 23
|
||||
#define K3_PDMA_SSPA1_RX 24
|
||||
#define K3_PDMA_SSPA2_TX 56
|
||||
#define K3_PDMA_SSPA2_RX 57
|
||||
#define K3_PDMA_SSPA3_TX 58
|
||||
#define K3_PDMA_SSPA3_RX 59
|
||||
#define K3_PDMA_SSPA4_TX 60
|
||||
#define K3_PDMA_SSPA4_RX 61
|
||||
#define K3_PDMA_SSPA5_TX 62
|
||||
#define K3_PDMA_SSPA5_RX 63
|
||||
|
||||
/* CAN DMA request numbers */
|
||||
#define K3_PDMA_CAN0_RX 43
|
||||
#define K3_PDMA_CAN1_RX 44
|
||||
#define K3_PDMA_CAN2_RX 51
|
||||
#define K3_PDMA_CAN3_RX 52
|
||||
|
||||
/* SSP0/1 DMA request numbers */
|
||||
#define K3_PDMA_SSP0_TX 64
|
||||
#define K3_PDMA_SSP0_RX 65
|
||||
#define K3_PDMA_SSP1_TX 66
|
||||
#define K3_PDMA_SSP1_RX 67
|
||||
|
||||
/* QSPI DMA request numbers */
|
||||
#define K3_PDMA_QSPI_RX 84
|
||||
#define K3_PDMA_QSPI_TX 85
|
||||
|
||||
#endif /* _DTS_SPACEMIT_K3_PDMA_H */
|
||||
|
|
@ -14,11 +14,13 @@ / {
|
|||
|
||||
aliases {
|
||||
ethernet0 = ð0;
|
||||
i2c2 = &i2c2;
|
||||
i2c8 = &i2c8;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0";
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@100000000 {
|
||||
|
|
@ -43,6 +45,42 @@ reg_aux_vcc5v: regulator-aux-vcc5v {
|
|||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_1_cfg>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x50>;
|
||||
pagesize = <8>;
|
||||
read-only;
|
||||
size = <256>;
|
||||
status = "okay";
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "onie,tlv-layout";
|
||||
|
||||
mac-address {
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
|
||||
num-macs {
|
||||
};
|
||||
|
||||
part-number {
|
||||
};
|
||||
|
||||
product-name {
|
||||
};
|
||||
|
||||
serial-number {
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c8_cfg>;
|
||||
|
|
@ -182,6 +220,11 @@ dldo7: dldo7 {
|
|||
};
|
||||
};
|
||||
|
||||
&combophy {
|
||||
spacemit,apmu = <&syscon_apmu 0x11>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_rgmii_0_cfg>, <&gmac0_phy_0_cfg>;
|
||||
|
|
@ -190,12 +233,70 @@ ð0 {
|
|||
status = "okay";
|
||||
|
||||
mdio {
|
||||
phy0: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
phy0: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-id001c.c916";
|
||||
reg = <1>;
|
||||
reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
|
||||
reset-assert-us = <10000>;
|
||||
reset-deassert-us = <10000>;
|
||||
reset-deassert-us = <50000>;
|
||||
realtek,aldps-enable;
|
||||
realtek,clkout-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&qspi_cfg {
|
||||
qspi-pins {
|
||||
power-source = <1800>;
|
||||
};
|
||||
|
||||
qspi-cs0-pins {
|
||||
power-source = <1800>;
|
||||
};
|
||||
};
|
||||
|
||||
&qspi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&qspi_cfg>;
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <26500000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
vcc-supply = <&aldo2>; /* PMIC_VCC1V8_QSPI */
|
||||
m25p,fast-read;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
bootinfo@0 {
|
||||
reg = <0x0 0x20000>;
|
||||
};
|
||||
|
||||
fsbl@20000 {
|
||||
reg = <0x20000 0x80000>;
|
||||
};
|
||||
|
||||
env@a0000 {
|
||||
reg = <0xa0000 0x10000>;
|
||||
};
|
||||
|
||||
esos@b0000 {
|
||||
reg = <0xb0000 0x100000>;
|
||||
};
|
||||
|
||||
opensbi@1b0000 {
|
||||
reg = <0x1b0000 0x60000>;
|
||||
};
|
||||
|
||||
uboot@210000 {
|
||||
reg = <0x210000 0x5f0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -221,3 +322,11 @@ hub@1 {
|
|||
&usb2_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3d_u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3d {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -78,6 +78,29 @@ gmac1-phy-0-pins {
|
|||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2c1_1_cfg: i2c1-1-cfg {
|
||||
i2c1-1-pins {
|
||||
pinmux = <K3_PADCONF(54, 5)>, /* i2c1 scl */
|
||||
<K3_PADCONF(55, 5)>; /* i2c1 sda */
|
||||
|
||||
bias-pull-up = <1>;
|
||||
drive-strength = <25>;
|
||||
power-source = <1800>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2c2_1_cfg: i2c2-1-cfg {
|
||||
i2c2-1-pins {
|
||||
pinmux = <K3_PADCONF(46, 5)>, /* i2c2 scl */
|
||||
<K3_PADCONF(47, 5)>; /* i2c2 sda */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <25>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
i2c8_cfg: i2c8-cfg {
|
||||
i2c8-pins {
|
||||
|
|
@ -679,6 +702,27 @@ pwm19-2-pins {
|
|||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
qspi_cfg: qspi-cfg {
|
||||
qspi-pins {
|
||||
pinmux = <K3_PADCONF(138, 0)>, /* qspi dat0 */
|
||||
<K3_PADCONF(139, 0)>, /* qspi dat1 */
|
||||
<K3_PADCONF(140, 0)>, /* qspi dat2 */
|
||||
<K3_PADCONF(141, 0)>, /* qspi dat3 */
|
||||
<K3_PADCONF(144, 0)>; /* qspi clk */
|
||||
|
||||
bias-disable;
|
||||
drive-strength = <25>;
|
||||
};
|
||||
|
||||
qspi-cs0-pins {
|
||||
pinmux = <K3_PADCONF(142, 0)>; /* qspi cs0 */
|
||||
|
||||
bias-disable;
|
||||
drive-strength = <25>;
|
||||
};
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
uart0_0_cfg: uart0-0-cfg {
|
||||
uart0-0-pins {
|
||||
|
|
@ -689,4 +733,48 @@ uart0-0-pins {
|
|||
drive-strength = <25>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_cfg: mmc1-cfg {
|
||||
mmc1-data-cmd-pins {
|
||||
pinmux = <K3_PADCONF(132, 0)>, /* mmc1 dat3 */
|
||||
<K3_PADCONF(133, 0)>, /* mmc1 dat2 */
|
||||
<K3_PADCONF(134, 0)>, /* mmc1 dat1 */
|
||||
<K3_PADCONF(135, 0)>, /* mmc1 dat0 */
|
||||
<K3_PADCONF(136, 0)>; /* mmc1 cmd */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <25>;
|
||||
power-source = <3300>;
|
||||
};
|
||||
|
||||
mmc1-clk-pins {
|
||||
pinmux = <K3_PADCONF(137, 0)>; /* mmc1 clk */
|
||||
|
||||
bias-pull-down;
|
||||
drive-strength = <25>;
|
||||
power-source = <3300>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc1_uhs_cfg: mmc1-uhs-cfg {
|
||||
mmc1-uhs-data-cmd-pins {
|
||||
pinmux = <K3_PADCONF(132, 0)>, /* mmc1 dat3 */
|
||||
<K3_PADCONF(133, 0)>, /* mmc1 dat2 */
|
||||
<K3_PADCONF(134, 0)>, /* mmc1 dat1 */
|
||||
<K3_PADCONF(135, 0)>, /* mmc1 dat0 */
|
||||
<K3_PADCONF(136, 0)>; /* mmc1 cmd */
|
||||
|
||||
bias-pull-up = <0>;
|
||||
drive-strength = <21>;
|
||||
power-source = <1800>;
|
||||
};
|
||||
|
||||
mmc1-uhs-clk-pins {
|
||||
pinmux = <K3_PADCONF(137, 0)>; /* mmc1 clk */
|
||||
|
||||
bias-pull-down;
|
||||
drive-strength = <21>;
|
||||
power-source = <1800>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -5,8 +5,11 @@
|
|||
*/
|
||||
|
||||
#include <dt-bindings/clock/spacemit,k3-clocks.h>
|
||||
#include <dt-bindings/reset/spacemit,k3-resets.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/reset/spacemit,k3-resets.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
|
||||
#include "k3-pdma.h"
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
|
|
@ -438,6 +441,47 @@ soc: soc {
|
|||
dma-noncoherent;
|
||||
ranges;
|
||||
|
||||
usb3d: usb@81a00000 {
|
||||
compatible = "spacemit,k3-dwc3";
|
||||
reg = <0x0 0x81a00000 0x0 0x10000>;
|
||||
interrupts = <149 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&saplic>;
|
||||
clocks = <&syscon_apmu CLK_APMU_USB3_PORTD_BUS>;
|
||||
clock-names = "usbdrd30";
|
||||
resets = <&syscon_apmu RESET_APMU_USB3_D_AHB>,
|
||||
<&syscon_apmu RESET_APMU_USB3_D_VCC>,
|
||||
<&syscon_apmu RESET_APMU_USB3_D_PHY>;
|
||||
reset-names = "ahb", "vcc", "phy";
|
||||
phys = <&usb3d_u2phy>,
|
||||
<&combophy 4 PHY_TYPE_USB3>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
phy_type = "utmi";
|
||||
snps,dis_enblslpm_quirk;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_u3_susphy_quirk;
|
||||
snps,dis-del-phy-power-chg-quirk;
|
||||
snps,dis-tx-ipgap-linecheck-quirk;
|
||||
snps,parkmode-disable-ss-quirk;
|
||||
dr_mode = "host";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb3d_u2phy: phy@81b00000 {
|
||||
compatible = "spacemit,k3-usb2-phy";
|
||||
reg = <0x0 0x81b00000 0x0 0x200>;
|
||||
clocks = <&syscon_apmu CLK_APMU_USB3_PORTD_BUS>;
|
||||
#phy-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
combophy: phy@81d00000 {
|
||||
compatible = "spacemit,k3-combo-phy";
|
||||
reg = <0x0 0x81d00000 0x0 0x600000>;
|
||||
#phy-cells = <2>;
|
||||
spacemit,apb-spare = <&pll>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb2_host: usb@c0a00000 {
|
||||
compatible = "spacemit,k3-dwc3";
|
||||
reg = <0x0 0xc0a00000 0x0 0x10000>;
|
||||
|
|
@ -927,6 +971,21 @@ pwm7: pwm@d401bc00 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
spi3: spi@d401c000 {
|
||||
compatible = "spacemit,k3-spi", "spacemit,k1-spi";
|
||||
reg = <0x0 0xd401c000 0x0 0x30>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_APBC_SPI3>,
|
||||
<&syscon_apbc CLK_APBC_SPI3_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_SPI3>;
|
||||
interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&pdma K3_PDMA_SSP3_RX>, <&pdma K3_PDMA_SSP3_TX>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm8: pwm@d4020000 {
|
||||
compatible = "spacemit,k3-pwm", "marvell,pxa910-pwm";
|
||||
reg = <0x0 0xd4020000 0x0 0x10>;
|
||||
|
|
@ -1081,6 +1140,155 @@ uart10: serial@d401f000 {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@d4040000 {
|
||||
compatible = "spacemit,k3-spi", "spacemit,k1-spi";
|
||||
reg = <0x0 0xd4040000 0x0 0x30>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_APBC_SPI0>,
|
||||
<&syscon_apbc CLK_APBC_SPI0_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_SPI0>;
|
||||
interrupts = <283 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&pdma K3_PDMA_SSP0_RX>, <&pdma K3_PDMA_SSP0_TX>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@d4040800 {
|
||||
compatible = "spacemit,k3-spi", "spacemit,k1-spi";
|
||||
reg = <0x0 0xd4040800 0x0 0x30>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&syscon_apbc CLK_APBC_SPI1>,
|
||||
<&syscon_apbc CLK_APBC_SPI1_BUS>;
|
||||
clock-names = "core", "bus";
|
||||
resets = <&syscon_apbc RESET_APBC_SPI1>;
|
||||
interrupts = <282 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&pdma K3_PDMA_SSP1_RX>, <&pdma K3_PDMA_SSP1_TX>;
|
||||
dma-names = "rx", "tx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2s0: i2s@d4026000 {
|
||||
compatible = "spacemit,k3-i2s";
|
||||
reg = <0x0 0xd4026000 0x0 0x30>;
|
||||
clocks = <&syscon_mpmu CLK_MPMU_I2S0_SYSCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S0_BCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S0_BUS>,
|
||||
<&syscon_apbc CLK_APBC_I2S0>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S0_SYSCLK_DIV>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_SYSCLK>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_BCLK>;
|
||||
clock-names = "sysclk", "bclk", "bus", "func",
|
||||
"sysclk_div", "c_sysclk", "c_bclk";
|
||||
dmas = <&pdma 21>, <&pdma 22>;
|
||||
dma-names = "tx", "rx";
|
||||
resets = <&syscon_apbc RESET_APBC_I2S0>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2s1: i2s@d4026800 {
|
||||
compatible = "spacemit,k3-i2s";
|
||||
reg = <0x0 0xd4026800 0x0 0x30>;
|
||||
clocks = <&syscon_mpmu CLK_MPMU_I2S1_SYSCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S1_BCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S1_BUS>,
|
||||
<&syscon_apbc CLK_APBC_I2S1>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_SYSCLK>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_BCLK>;
|
||||
clock-names = "sysclk", "bclk", "bus", "func",
|
||||
"c_sysclk", "c_bclk";
|
||||
dmas = <&pdma 23>, <&pdma 24>;
|
||||
dma-names = "tx", "rx";
|
||||
resets = <&syscon_apbc RESET_APBC_I2S1>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2s2: i2s@d4027000 {
|
||||
compatible = "spacemit,k3-i2s";
|
||||
reg = <0x0 0xd4027000 0x0 0x30>;
|
||||
clocks = <&syscon_mpmu CLK_MPMU_I2S2_SYSCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S2_BCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S2_BUS>,
|
||||
<&syscon_apbc CLK_APBC_I2S2>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S2_SYSCLK_DIV>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_SYSCLK>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_BCLK>;
|
||||
clock-names = "sysclk", "bclk", "bus", "func",
|
||||
"sysclk_div", "c_sysclk", "c_bclk";
|
||||
dmas = <&pdma 56>, <&pdma 57>;
|
||||
dma-names = "tx", "rx";
|
||||
resets = <&syscon_apbc RESET_APBC_I2S2>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2s3: i2s@d4027800 {
|
||||
compatible = "spacemit,k3-i2s";
|
||||
reg = <0x0 0xd4027800 0x0 0x30>;
|
||||
clocks = <&syscon_mpmu CLK_MPMU_I2S3_SYSCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S3_BCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S3_BUS>,
|
||||
<&syscon_apbc CLK_APBC_I2S3>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S3_SYSCLK_DIV>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_SYSCLK>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_BCLK>;
|
||||
clock-names = "sysclk", "bclk", "bus", "func",
|
||||
"sysclk_div", "c_sysclk", "c_bclk";
|
||||
dmas = <&pdma 58>, <&pdma 59>;
|
||||
dma-names = "tx", "rx";
|
||||
resets = <&syscon_apbc RESET_APBC_I2S3>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2s4: i2s@d4041000 {
|
||||
compatible = "spacemit,k3-i2s";
|
||||
reg = <0x0 0xd4041000 0x0 0x30>;
|
||||
clocks = <&syscon_mpmu CLK_MPMU_I2S4_SYSCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S4_BCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S4_BUS>,
|
||||
<&syscon_apbc CLK_APBC_I2S4>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S4_SYSCLK_DIV>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_SYSCLK>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_BCLK>;
|
||||
clock-names = "sysclk", "bclk", "bus", "func",
|
||||
"sysclk_div", "c_sysclk", "c_bclk";
|
||||
dmas = <&pdma 60>, <&pdma 61>;
|
||||
dma-names = "tx", "rx";
|
||||
resets = <&syscon_apbc RESET_APBC_I2S4>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2s5: i2s@d4041800 {
|
||||
compatible = "spacemit,k3-i2s";
|
||||
reg = <0x0 0xd4041800 0x0 0x30>;
|
||||
clocks = <&syscon_mpmu CLK_MPMU_I2S5_SYSCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S5_BCLK>,
|
||||
<&syscon_apbc CLK_APBC_I2S5_BUS>,
|
||||
<&syscon_apbc CLK_APBC_I2S5>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S5_SYSCLK_DIV>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_SYSCLK>,
|
||||
<&syscon_mpmu CLK_MPMU_I2S_BCLK>;
|
||||
clock-names = "sysclk", "bclk", "bus", "func",
|
||||
"sysclk_div", "c_sysclk", "c_bclk";
|
||||
dmas = <&pdma 62>, <&pdma 63>;
|
||||
dma-names = "tx", "rx";
|
||||
resets = <&syscon_apbc RESET_APBC_I2S5>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
syscon_mpmu: system-controller@d4050000 {
|
||||
compatible = "spacemit,k3-syscon-mpmu";
|
||||
reg = <0x0 0xd4050000 0x0 0x10000>;
|
||||
|
|
@ -1099,6 +1307,36 @@ pll: clock-controller@d4090000 {
|
|||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
qspi: spi@d420c000 {
|
||||
compatible = "spacemit,k3-qspi",
|
||||
"spacemit,k1-qspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x0 0xd420c000 0x0 0x1000>,
|
||||
<0x0 0xb8000000 0x0 0xc00000>;
|
||||
reg-names = "QuadSPI", "QuadSPI-memory";
|
||||
clocks = <&syscon_apmu CLK_APMU_QSPI_BUS>,
|
||||
<&syscon_apmu CLK_APMU_QSPI>;
|
||||
clock-names = "qspi_en", "qspi";
|
||||
resets = <&syscon_apmu RESET_APMU_QSPI>,
|
||||
<&syscon_apmu RESET_APMU_QSPI_BUS>;
|
||||
interrupts = <117 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sdhci0: mmc@d4280000 {
|
||||
compatible = "spacemit,k3-sdhci";
|
||||
reg = <0x0 0xd4280000 0x0 0x200>;
|
||||
clocks = <&syscon_apmu CLK_APMU_SDH_AXI>,
|
||||
<&syscon_apmu CLK_APMU_SDH0>;
|
||||
clock-names = "core", "io";
|
||||
resets = <&syscon_apmu RESET_APMU_SDH_AXI>,
|
||||
<&syscon_apmu RESET_APMU_SDH0>;
|
||||
reset-names = "axi", "sdh";
|
||||
interrupts = <99 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
syscon_apmu: system-controller@d4282800 {
|
||||
compatible = "spacemit,k3-syscon-apmu";
|
||||
reg = <0x0 0xd4282800 0x0 0x400>;
|
||||
|
|
|
|||
|
|
@ -81,6 +81,8 @@ static const struct of_device_id allowlist[] __initconst = {
|
|||
{ .have_governor_per_policy = true, },
|
||||
},
|
||||
|
||||
{ .compatible = "spacemit,k1", },
|
||||
|
||||
{ .compatible = "st-ericsson,u8500", },
|
||||
{ .compatible = "st-ericsson,u8540", },
|
||||
{ .compatible = "st-ericsson,u9500", },
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user