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ASoC: SOF: ipc3: Add set_core_state pm_ops implementation

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IPC3 uses sof_ipc_pm_core_config message
(SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CORE_ENABLE) to enable/disable cores
managed by the DSP.
The core state is set via a single bitfield, if the bit is 1 the core
should be on, if it is 0 then it is off.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220610083549.16773-4-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Peter Ujfalusi 2022-06-10 11:35:46 +03:00 committed by Mark Brown
parent b41252d882
commit 0a047dafef
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GPG Key ID: 24D68B725D5487D0
1 changed files with 18 additions and 0 deletions
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18
sound/soc/sof/ipc3.c
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@ -1037,6 +1037,23 @@ static void sof_ipc3_rx_msg(struct snd_sof_dev *sdev)
ipc3_log_header(sdev->dev, "ipc rx done", hdr.cmd);
}
static int sof_ipc3_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
{
struct sof_ipc_pm_core_config core_cfg = {
.hdr.size = sizeof(core_cfg),
.hdr.cmd = SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CORE_ENABLE,
};
struct sof_ipc_reply reply;
if (on)
core_cfg.enable_mask = sdev->enabled_cores_mask | BIT(core_idx);
else
core_cfg.enable_mask = sdev->enabled_cores_mask & ~BIT(core_idx);
return sof_ipc3_tx_msg(sdev, &core_cfg, sizeof(core_cfg),
&reply, sizeof(reply), false);
}
static int sof_ipc3_ctx_ipc(struct snd_sof_dev *sdev, int cmd)
{
struct sof_ipc_pm_ctx pm_ctx = {
@ -1063,6 +1080,7 @@ static int sof_ipc3_ctx_restore(struct snd_sof_dev *sdev)
static const struct sof_ipc_pm_ops ipc3_pm_ops = {
.ctx_save = sof_ipc3_ctx_save,
.ctx_restore = sof_ipc3_ctx_restore,
.set_core_state = sof_ipc3_set_core_state,
};
const struct sof_ipc_ops ipc3_ops = {