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drm/bridge: analogix_dp: Add source capacity limits in .mode_vaild

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Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I2a60ee26534ebda02dabe3c22453ad70b0aebdc3
This commit is contained in:
Wyon Bi 2022-03-23 16:09:18 +08:00 committed by Tao Huang
parent 4ef940337d
commit 099bdfba32
1 changed files with 8 additions and 2 deletions
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10
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
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@ -1635,15 +1635,21 @@ analogix_dp_bridge_mode_valid(struct drm_bridge *bridge,
{
struct analogix_dp_device *dp = bridge->driver_private;
struct drm_display_mode m;
u32 max_link_rate, max_lane_count;
drm_mode_copy(&m, mode);
if (dp->plat_data->split_mode)
dp->plat_data->convert_to_origin_mode(&m);
max_link_rate = min_t(u32, dp->video_info.max_link_rate,
dp->link_train.link_rate);
max_lane_count = min_t(u32, dp->video_info.max_lane_count,
dp->link_train.lane_count);
if (!analogix_dp_bandwidth_ok(dp, &m,
drm_dp_bw_code_to_link_rate(dp->link_train.link_rate),
dp->link_train.lane_count))
drm_dp_bw_code_to_link_rate(max_link_rate),
max_lane_count))
return MODE_BAD;
return MODE_OK;