github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-07-31 11:37:06 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: freescale: imx8mp-verdin: Split UART_2 pinctrl group

Browse Source 
Some carrier board reuse the UART_2 control signals as GPIO, split
the pinctrl RTS/CTS in separated nodes to maximize flexibility.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Francesco Dolcini 2026-04-09 11:58:50 +02:00 committed by Frank Li
parent de2e5e6c69
commit 097418652e
1 changed files with 11 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
View File

@ -846,7 +846,7 @@ &uart1 {
/* Verdin UART_2 */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
pinctrl-0 = <&pinctrl_uart2>, <&pinctrl_uart2_cts>, <&pinctrl_uart2_rts>;
uart-has-rtscts;
};
@ -1277,10 +1277,18 @@ pinctrl_uart1: uart1grp {
<MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x1c4>; /* SODIMM 131 */
};
pinctrl_uart2_cts: uart2ctsgrp {
fsl,pins =
<MX8MP_IOMUXC_SD1_DATA4__UART2_DCE_RTS 0x1c4>; /* SODIMM 143 */
};
pinctrl_uart2_rts: uart2rtsgrp {
fsl,pins =
<MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS 0x1c4>; /* SODIMM 141 */
};
pinctrl_uart2: uart2grp {
fsl,pins =
<MX8MP_IOMUXC_SD1_DATA4__UART2_DCE_RTS 0x1c4>, /* SODIMM 143 */
<MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS 0x1c4>, /* SODIMM 141 */
<MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x1c4>, /* SODIMM 137 */
<MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x1c4>; /* SODIMM 139 */
};