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phy: rockchip-pcie: enable each lane when phy_power_on
Change-Id: I9c56ee76f0c1a9c47878113d1d034760af97cc12 Signed-off-by: Simon Xue <xxm@rock-chips.com>
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@ -182,6 +182,12 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
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mutex_lock(&rk_phy->pcie_mutex);
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regmap_write(rk_phy->reg_base,
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rk_phy->phy_data->pcie_laneoff,
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HIWORD_UPDATE(!PHY_LANE_IDLE_OFF,
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PHY_LANE_IDLE_MASK,
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PHY_LANE_IDLE_A_SHIFT + inst->index));
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if (rk_phy->pwr_cnt++)
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goto err_out;
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@ -196,12 +202,6 @@ static int rockchip_pcie_phy_power_on(struct phy *phy)
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PHY_CFG_ADDR_MASK,
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PHY_CFG_ADDR_SHIFT));
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regmap_write(rk_phy->reg_base,
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rk_phy->phy_data->pcie_laneoff,
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HIWORD_UPDATE(!PHY_LANE_IDLE_OFF,
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PHY_LANE_IDLE_MASK,
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PHY_LANE_IDLE_A_SHIFT + inst->index));
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/*
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* No documented timeout value for phy operation below,
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* so we make it large enough here. And we use loop-break
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