pinctrl: at91-pio4: Add sama7d65 pio4 support

Add sama7d65 compatibility string.

Sama7d65 does not have a full last bank of PIO lines similar to the
Sama7g54 SoC. Sama7d65 only has 14 lines on the last PIO bank not the
full 32; adjusting the SoC attributes accordingly.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Ryan Wanner 2026-01-05 10:59:56 +01:00 committed by Linus Walleij
parent 6e00258964
commit 0968c81ce9

View File

@ -1053,6 +1053,12 @@ static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = {
.last_bank_count = ATMEL_PIO_NPINS_PER_BANK,
};
static const struct atmel_pioctrl_data microchip_sama7d65_pioctrl_data = {
.nbanks = 5,
.last_bank_count = 14, /* sama7d65 has only PE0 to PE13 */
.slew_rate_support = 1,
};
static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = {
.nbanks = 5,
.last_bank_count = 8, /* sama7g5 has only PE0 to PE7 */
@ -1063,6 +1069,9 @@ static const struct of_device_id atmel_pctrl_of_match[] = {
{
.compatible = "atmel,sama5d2-pinctrl",
.data = &atmel_sama5d2_pioctrl_data,
}, {
.compatible = "microchip,sama7d65-pinctrl",
.data = &microchip_sama7d65_pioctrl_data,
}, {
.compatible = "microchip,sama7g5-pinctrl",
.data = &microchip_sama7g5_pioctrl_data,