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drm: panel: jd9365da: fix reset signal polarity in unprepare
commita8972d5a49("drm: panel: jd9365da-h3: fix reset signal polarity") fixed reset signal polarity in jadard_dsi_probe() and jadard_prepare(). It was not done in jadard_unprepare() because of an incorrect assumption about reset line handling in power off mode. After looking into the datasheet, it now appears that before disabling regulators, the reset line is deasserted first, and if reset_before_power_off_vcioo is true, then the reset line is asserted. Fix reset polarity by inverting gpiod_set_value() second argument in in jadard_unprepare(). Fixes:6b818c533d("drm: panel: Add Jadard JD9365DA-H3 DSI panel") Fixes:2b976ad760("drm/panel: jd9365da: Support for kd101ne3-40ti MIPI-DSI panel") Fixes:a8972d5a49("drm: panel: jd9365da-h3: fix reset signal polarity") Cc: stable@vger.kernel.org Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250417195507.778731-1-hugo@hugovil.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250417195507.778731-1-hugo@hugovil.com
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@ -129,11 +129,11 @@ static int jadard_unprepare(struct drm_panel *panel)
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{
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struct jadard *jadard = panel_to_jadard(panel);
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gpiod_set_value(jadard->reset, 1);
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gpiod_set_value(jadard->reset, 0);
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msleep(120);
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if (jadard->desc->reset_before_power_off_vcioo) {
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gpiod_set_value(jadard->reset, 0);
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gpiod_set_value(jadard->reset, 1);
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usleep_range(1000, 2000);
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}
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