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e1000e: clear DPG_EN after reset to avoid autonomous power-gating

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Panther Lake systems introduced an autonomous power gating feature for
the integrated Gigabit Ethernet in shutdown state (S5) state. As part of
it, the reset value of DPG_EN bit was changed to 1. Clear this bit after
performing hardware reset to avoid errors such as Tx/Rx hangs, or packet
loss/corruption.

Fixes: 0c9183ce61 ("e1000e: Add support for the next LOM generation")
Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Tested-by: Avigail Dahan <avigailx.dahan@intel.com>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Vitaly Lifshits 2026-01-06 16:14:20 +02:00 committed by Tony Nguyen
parent 5b644464ee
commit 0942fc6d32
2 changed files with 10 additions and 0 deletions
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1
drivers/net/ethernet/intel/e1000e/defines.h
View File

@ -33,6 +33,7 @@
/* Extended Device Control */
#define E1000_CTRL_EXT_LPCD 0x00000004 /* LCD Power Cycle Done */
#define E1000_CTRL_EXT_DPG_EN 0x00000008 /* Dynamic Power Gating Enable */
#define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable Pin 3 */
#define E1000_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */
#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */

9
drivers/net/ethernet/intel/e1000e/ich8lan.c
View File

@ -4932,6 +4932,15 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
reg |= E1000_KABGTXD_BGSQLBIAS;
ew32(KABGTXD, reg);
/* The hardware reset value of the DPG_EN bit is 1.
* Clear DPG_EN to prevent unexpected autonomous power gating.
*/
if (hw->mac.type >= e1000_pch_ptp) {
reg = er32(CTRL_EXT);
reg &= ~E1000_CTRL_EXT_DPG_EN;
ew32(CTRL_EXT, reg);
}
return 0;
}