mirror of
https://github.com/torvalds/linux.git
synced 2026-05-23 06:31:58 +02:00
drm/xe/display: Add Xe implementation for fence checks used by fbc code
Xe doesn't support legacy fences. Implement legacy fence and fence id checks accordingly. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
parent
c890be7393
commit
08ea5ea2e8
|
|
@ -24,6 +24,7 @@
|
|||
#include "i915_gpu_error.h"
|
||||
#include "i915_reg_defs.h"
|
||||
#include "i915_utils.h"
|
||||
#include "intel_gt_types.h"
|
||||
#include "intel_step.h"
|
||||
#include "intel_uc_fw.h"
|
||||
#include "intel_uncore.h"
|
||||
|
|
|
|||
|
|
@ -24,6 +24,8 @@ struct i915_vma {
|
|||
|
||||
#define i915_ggtt_clear_scanout(bo) do { } while (0)
|
||||
|
||||
#define i915_vma_fence_id(vma) -1
|
||||
|
||||
static inline u32 i915_ggtt_offset(const struct i915_vma *vma)
|
||||
{
|
||||
return vma->node.start;
|
||||
|
|
|
|||
11
drivers/gpu/drm/xe/compat-i915-headers/intel_gt_types.h
Normal file
11
drivers/gpu/drm/xe/compat-i915-headers/intel_gt_types.h
Normal file
|
|
@ -0,0 +1,11 @@
|
|||
/* SPDX-License-Identifier: MIT */
|
||||
/*
|
||||
* Copyright © 2023 Intel Corporation
|
||||
*/
|
||||
|
||||
#ifndef __INTEL_GT_TYPES__
|
||||
#define __INTEL_GT_TYPES__
|
||||
|
||||
#define intel_gt_support_legacy_fencing(gt) 0
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user