diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 700a8612ff67..8555bbf47c63 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -203,6 +203,8 @@ config MIPS_ALCHEMY select CSRC_R4K select IRQ_MIPS_CPU select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is + select GPIOLIB + select GPIOLIB_LEGACY select MIPS_FIXUP_BIGPHYS_ADDR if PCI select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL @@ -304,6 +306,7 @@ config BCM47XX select SYS_HAS_EARLY_PRINTK select USE_GENERIC_EARLY_PRINTK_8250 select GPIOLIB + select GPIOLIB_LEGACY select LEDS_GPIO_REGISTER select BCM47XX_NVRAM select BCM47XX_SPROM @@ -327,6 +330,7 @@ config BCM63XX select SYS_HAS_CPU_BMIPS4380 select SWAP_IO_SPACE select GPIOLIB + select GPIOLIB_LEGACY select MIPS_L1_CACHE_SHIFT_4 select HAVE_LEGACY_CLK help @@ -996,6 +1000,7 @@ config MIKROTIK_RB532 select SWAP_IO_SPACE select BOOT_RAW select GPIOLIB + select GPIOLIB_LEGACY select MIPS_L1_CACHE_SHIFT_4 help Support the Mikrotik(tm) RouterBoard 532 series, @@ -1046,15 +1051,6 @@ config CAVIUM_OCTEON_SOC endchoice -config FIT_IMAGE_FDT_EPM5 - bool "Include FDT for Mobileye EyeQ5 development platforms" - depends on MACH_EYEQ5 - default n - help - Enable this to include the FDT for the EyeQ5 development platforms - from Mobileye in the FIT kernel image. - This requires u-boot on the platform. - source "arch/mips/alchemy/Kconfig" source "arch/mips/ath25/Kconfig" source "arch/mips/ath79/Kconfig" diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig index 6ca81e1bd35c..cf5ad52c0a0f 100644 --- a/arch/mips/alchemy/Kconfig +++ b/arch/mips/alchemy/Kconfig @@ -12,7 +12,6 @@ config MIPS_MTX1 config MIPS_DB1XXX bool "Alchemy DB1XXX / PB1XXX boards" - select GPIOLIB select HAVE_PCI select HAVE_PATA_PLATFORM select SYS_SUPPORTS_LITTLE_ENDIAN diff --git a/arch/mips/alchemy/board-gpr.c b/arch/mips/alchemy/board-gpr.c index f587c40b6d00..387252337a18 100644 --- a/arch/mips/alchemy/board-gpr.c +++ b/arch/mips/alchemy/board-gpr.c @@ -13,11 +13,11 @@ #include #include #include -#include -#include #include #include #include +#include +#include #include #include #include @@ -161,66 +161,90 @@ static struct platform_device gpr_mtd_device = { /* * LEDs */ -static const struct gpio_led gpr_gpio_leds[] = { - { /* green */ - .name = "gpr:green", - .gpio = 4, - .active_low = 1, - }, - { /* red */ - .name = "gpr:red", - .gpio = 5, - .active_low = 1, - } +static const struct software_node gpr_gpio_leds_node = { + .name = "gpr-leds", }; -static struct gpio_led_platform_data gpr_led_data = { - .num_leds = ARRAY_SIZE(gpr_gpio_leds), - .leds = gpr_gpio_leds, +static const struct property_entry gpr_green_led_props[] = { + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpio1_node, 4, GPIO_ACTIVE_LOW), + { } }; -static struct platform_device gpr_led_devices = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpr_led_data, - } +static const struct software_node gpr_green_led_node = { + .name = "gpr:green", + .parent = &gpr_gpio_leds_node, + .properties = gpr_green_led_props, }; +static const struct property_entry gpr_red_led_props[] = { + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpio1_node, 5, GPIO_ACTIVE_LOW), + { } +}; + +static const struct software_node gpr_red_led_node = { + .name = "gpr:red", + .parent = &gpr_gpio_leds_node, + .properties = gpr_red_led_props, +}; + +static const struct software_node * const gpr_gpio_leds_swnodes[] __initconst = { + &gpr_gpio_leds_node, + &gpr_green_led_node, + &gpr_red_led_node, + NULL +}; + +static void __init gpr_leds_init(void) +{ + const struct platform_device_info pdevinfo = { + .name = "leds-gpio", + .id = PLATFORM_DEVID_NONE, + .swnode = &gpr_gpio_leds_node, + }; + struct platform_device *pd; + int err; + + err = software_node_register_node_group(gpr_gpio_leds_swnodes); + if (err) { + pr_err("failed to register LED software nodes: %d\n", err); + return; + } + + pd = platform_device_register_full(&pdevinfo); + err = PTR_ERR_OR_ZERO(pd); + if (err) + pr_err("failed to create LED device: %d\n", err); +} + /* * I2C */ -static struct gpiod_lookup_table gpr_i2c_gpiod_table = { - .dev_id = "i2c-gpio", - .table = { - /* - * This should be on "GPIO2" which has base at 200 so - * the global numbers 209 and 210 should correspond to - * local offsets 9 and 10. - */ - GPIO_LOOKUP_IDX("alchemy-gpio2", 9, NULL, 0, - GPIO_ACTIVE_HIGH), - GPIO_LOOKUP_IDX("alchemy-gpio2", 10, NULL, 1, - GPIO_ACTIVE_HIGH), - }, +static const struct property_entry gpr_i2c_props[] __initconst = { + PROPERTY_ENTRY_GPIO("sda-gpios", &alchemy_gpio2_node, 9, GPIO_ACTIVE_HIGH), + PROPERTY_ENTRY_GPIO("scl-gpios", &alchemy_gpio2_node, 10, GPIO_ACTIVE_HIGH), + PROPERTY_ENTRY_U32("i2c-gpio,delay-us", 2), /* ~100 kHz */ + PROPERTY_ENTRY_U32("i2c-gpio,timeout-ms", 1000), + PROPERTY_ENTRY_BOOL("i2c-gpio,sda-open-drain"), + PROPERTY_ENTRY_BOOL("i2c-gpio,scl-open-drain"), + { } }; -static struct i2c_gpio_platform_data gpr_i2c_data = { - /* - * The open drain mode is hardwired somewhere or an electrical - * property of the alchemy GPIO controller. - */ - .sda_is_open_drain = 1, - .scl_is_open_drain = 1, - .udelay = 2, /* ~100 kHz */ - .timeout = HZ, +static const struct platform_device_info gpr_i2c_pdev_info __initconst = { + .name = "i2c-gpio", + .id = PLATFORM_DEVID_NONE, + .properties = gpr_i2c_props, }; -static struct platform_device gpr_i2c_device = { - .name = "i2c-gpio", - .id = -1, - .dev.platform_data = &gpr_i2c_data, -}; +static void __init gpr_i2c_init(void) +{ + struct platform_device *pd; + int err; + + pd = platform_device_register_full(&gpr_i2c_pdev_info); + err = PTR_ERR_OR_ZERO(pd); + if (err) + pr_err("failed to create I2C device: %d\n", err); +} static struct i2c_board_info gpr_i2c_info[] __initdata = { { @@ -270,8 +294,6 @@ static struct platform_device gpr_pci_host_dev = { static struct platform_device *gpr_devices[] __initdata = { &gpr_wdt_device, &gpr_mtd_device, - &gpr_i2c_device, - &gpr_led_devices, }; static int __init gpr_pci_init(void) @@ -284,8 +306,9 @@ arch_initcall(gpr_pci_init); static int __init gpr_dev_init(void) { - gpiod_add_lookup_table(&gpr_i2c_gpiod_table); i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info)); + gpr_i2c_init(); + gpr_leds_init(); return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices)); } diff --git a/arch/mips/alchemy/board-mtx1.c b/arch/mips/alchemy/board-mtx1.c index cb6be58808a0..88c20c0ca96d 100644 --- a/arch/mips/alchemy/board-mtx1.c +++ b/arch/mips/alchemy/board-mtx1.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -78,17 +79,13 @@ void __init board_setup(void) /******************************************************************************/ -static const struct software_node mtx1_gpiochip_node = { - .name = "alchemy-gpio2", -}; - static const struct software_node mtx1_gpio_keys_node = { .name = "mtx1-gpio-keys", }; static const struct property_entry mtx1_button_props[] = { PROPERTY_ENTRY_U32("linux,code", BTN_0), - PROPERTY_ENTRY_GPIO("gpios", &mtx1_gpiochip_node, 7, GPIO_ACTIVE_HIGH), + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpio2_node, 7, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_STRING("label", "System button"), { } }; @@ -98,7 +95,7 @@ static const struct software_node mtx1_button_node = { .properties = mtx1_button_props, }; -static const struct software_node *mtx1_gpio_keys_swnodes[] __initconst = { +static const struct software_node * const mtx1_gpio_keys_swnodes[] __initconst = { &mtx1_gpio_keys_node, &mtx1_button_node, NULL @@ -127,13 +124,13 @@ static void __init mtx1_keys_init(void) pr_err("failed to create gpio-keys device: %d\n", err); } -/* Global number 215 is offset 15 on Alchemy GPIO 2 */ static const struct property_entry mtx1_wdt_props[] = { - PROPERTY_ENTRY_GPIO("gpios", &mtx1_gpiochip_node, 15, GPIO_ACTIVE_HIGH), + /* Global number 215 is offset 15 on Alchemy GPIO 2 */ + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpio2_node, 15, GPIO_ACTIVE_HIGH), { } }; -static struct platform_device_info mtx1_wdt_info __initconst = { +static const struct platform_device_info mtx1_wdt_info __initconst = { .name = "mtx1-wdt", .id = 0, .properties = mtx1_wdt_props, @@ -147,7 +144,7 @@ static void __init mtx1_wdt_init(void) pd = platform_device_register_full(&mtx1_wdt_info); err = PTR_ERR_OR_ZERO(pd); if (err) - pr_err("failed to create gpio-keys device: %d\n", err); + pr_err("failed to create watchdog device: %d\n", err); } static const struct software_node mtx1_gpio_leds_node = { @@ -155,7 +152,7 @@ static const struct software_node mtx1_gpio_leds_node = { }; static const struct property_entry mtx1_green_led_props[] = { - PROPERTY_ENTRY_GPIO("gpios", &mtx1_gpiochip_node, 11, GPIO_ACTIVE_HIGH), + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpio2_node, 11, GPIO_ACTIVE_HIGH), { } }; @@ -166,7 +163,7 @@ static const struct software_node mtx1_green_led_node = { }; static const struct property_entry mtx1_red_led_props[] = { - PROPERTY_ENTRY_GPIO("gpios", &mtx1_gpiochip_node, 12, GPIO_ACTIVE_HIGH), + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpio2_node, 12, GPIO_ACTIVE_HIGH), { } }; @@ -176,7 +173,7 @@ static const struct software_node mtx1_red_led_node = { .properties = mtx1_red_led_props, }; -static const struct software_node *mtx1_gpio_leds_swnodes[] = { +static const struct software_node * const mtx1_gpio_leds_swnodes[] __initconst = { &mtx1_gpio_leds_node, &mtx1_green_led_node, &mtx1_red_led_node, @@ -185,9 +182,10 @@ static const struct software_node *mtx1_gpio_leds_swnodes[] = { static void __init mtx1_leds_init(void) { - struct platform_device_info led_info = { + const struct platform_device_info pdevinfo = { .name = "leds-gpio", .id = PLATFORM_DEVID_NONE, + .swnode = &mtx1_gpio_leds_node, }; struct platform_device *led_dev; int err; @@ -198,9 +196,7 @@ static void __init mtx1_leds_init(void) return; } - led_info.fwnode = software_node_fwnode(&mtx1_gpio_leds_node); - - led_dev = platform_device_register_full(&led_info); + led_dev = platform_device_register_full(&pdevinfo); err = PTR_ERR_OR_ZERO(led_dev); if (err) pr_err("failed to create LED device: %d\n", err); @@ -335,10 +331,6 @@ static int __init mtx1_register_devices(void) au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata); - rc = software_node_register(&mtx1_gpiochip_node); - if (rc) - return rc; - rc = platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs)); if (rc) return rc; diff --git a/arch/mips/alchemy/common/gpiolib.c b/arch/mips/alchemy/common/gpiolib.c index e79e26ffac99..c926cc137561 100644 --- a/arch/mips/alchemy/common/gpiolib.c +++ b/arch/mips/alchemy/common/gpiolib.c @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -95,7 +96,26 @@ static int gpio1_to_irq(struct gpio_chip *chip, unsigned offset) return alchemy_gpio1_to_irq(offset + ALCHEMY_GPIO1_BASE); } -struct gpio_chip alchemy_gpio_chip[] = { +const struct software_node alchemy_gpio1_node = { + .name = "alchemy-gpio1", +}; + +const struct software_node alchemy_gpio2_node = { + .name = "alchemy-gpio2", +}; + +const struct software_node alchemy_gpic_node = { + .name = "alchemy-gpic", +}; + +static const struct software_node *alchemy_gpio_node_group[] = { + &alchemy_gpio1_node, + &alchemy_gpio2_node, + &alchemy_gpic_node, + NULL +}; + +static struct gpio_chip alchemy_gpio_chip[] = { [0] = { .label = "alchemy-gpio1", .direction_input = gpio1_direction_input, @@ -157,6 +177,29 @@ static struct gpio_chip au1300_gpiochip = { .ngpio = AU1300_GPIO_NUM, }; +/* + * Software nodes must be registered before board-specific code (that runs + * at arch_initcall level) attempts to use them as GPIO targets or as fwnodes + * for registered devices. We can not do registration in alchemy_gpiochip_init + * because it also runs as arch_initcall and runs after board-specific code + * because of the link order, and so we do it at postcore_initcall level. + */ +static int __init alchemy_gpio_nodes_init(void) +{ + int ret; + + ret = software_node_register_node_group(alchemy_gpio_node_group); + if (ret) + return ret; + + alchemy_gpio_chip[0].fwnode = software_node_fwnode(&alchemy_gpio1_node); + alchemy_gpio_chip[1].fwnode = software_node_fwnode(&alchemy_gpio2_node); + au1300_gpiochip.fwnode = software_node_fwnode(&alchemy_gpic_node); + + return 0; +} +postcore_initcall(alchemy_gpio_nodes_init); + static int __init alchemy_gpiochip_init(void) { int ret = 0; diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devboards/db1000.c index 6984cd5169b5..8fb24b220e3a 100644 --- a/arch/mips/alchemy/devboards/db1000.c +++ b/arch/mips/alchemy/devboards/db1000.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include @@ -27,6 +26,8 @@ #include #include #include + +#include "db1xxx.h" #include "platform.h" #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT) @@ -375,20 +376,15 @@ static struct platform_device db1100_mmc1_dev = { /******************************************************************************/ -static const struct software_node db1100_alchemy2_gpiochip = { - .name = "alchemy-gpio2", -}; - -static const struct property_entry db1100_ads7846_properties[] = { +static const struct property_entry db1100_ads7846_props[] = { PROPERTY_ENTRY_U16("ti,vref_min", 3300), - PROPERTY_ENTRY_GPIO("pendown-gpios", - &db1100_alchemy2_gpiochip, 21, GPIO_ACTIVE_LOW), + PROPERTY_ENTRY_GPIO("pendown-gpios", &alchemy_gpio2_node, 21, GPIO_ACTIVE_LOW), { } }; static const struct software_node db1100_ads7846_swnode = { .name = "ads7846", - .properties = db1100_ads7846_properties, + .properties = db1100_ads7846_props, }; static struct spi_board_info db1100_spi_info[] __initdata = { @@ -403,32 +399,26 @@ static struct spi_board_info db1100_spi_info[] __initdata = { }, }; -static const struct spi_gpio_platform_data db1100_spictl_pd __initconst = { - .num_chipselect = 1, -}; - /* * Alchemy GPIO 2 has its base at 200 so the GPIO lines * 207 thru 210 are GPIOs at offset 7 thru 10 at this chip. */ static const struct property_entry db1100_spi_dev_properties[] __initconst = { PROPERTY_ENTRY_GPIO("miso-gpios", - &db1100_alchemy2_gpiochip, 7, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 7, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("mosi-gpios", - &db1100_alchemy2_gpiochip, 8, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 8, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("sck-gpios", - &db1100_alchemy2_gpiochip, 9, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 9, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("cs-gpios", - &db1100_alchemy2_gpiochip, 10, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 10, GPIO_ACTIVE_HIGH), { } }; static const struct platform_device_info db1100_spi_dev_info __initconst = { .name = "spi_gpio", .id = 0, - .data = &db1100_spictl_pd, - .size_data = sizeof(db1100_spictl_pd), - .dma_mask = DMA_BIT_MASK(32), + .dma_mask = DMA_BIT_MASK(32), .properties = db1100_spi_dev_properties, }; @@ -481,7 +471,6 @@ int __init db1000_dev_setup(void) pfc |= (1 << 0); /* SSI0 pins as GPIOs */ alchemy_wrsys(pfc, AU1000_SYS_PINFUNC); - software_node_register(&db1100_alchemy2_gpiochip); spi_register_board_info(db1100_spi_info, ARRAY_SIZE(db1100_spi_info)); diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c index 67f067706af2..de2a9083ed9a 100644 --- a/arch/mips/alchemy/devboards/db1200.c +++ b/arch/mips/alchemy/devboards/db1200.c @@ -30,6 +30,7 @@ #include #include +#include "db1xxx.h" #include "platform.h" #define BCSR_INT_IDE 0x0001 diff --git a/arch/mips/alchemy/devboards/db1300.c b/arch/mips/alchemy/devboards/db1300.c index d377e043b49f..a7b8b7e8291f 100644 --- a/arch/mips/alchemy/devboards/db1300.c +++ b/arch/mips/alchemy/devboards/db1300.c @@ -7,10 +7,10 @@ #include #include -#include -#include +#include +#include #include -#include /* KEY_* codes */ +#include #include #include #include @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -32,6 +33,7 @@ #include #include +#include "db1xxx.h" #include "platform.h" /* FPGA (external mux) interrupt sources */ @@ -236,23 +238,38 @@ static struct resource db1300_eth_res[] = { }, }; -static struct smsc911x_platform_config db1300_eth_config = { - .phy_interface = PHY_INTERFACE_MODE_MII, - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, - .flags = SMSC911X_USE_32BIT, +static u8 db1300_eth_macaddr[6]; + +static const struct property_entry db1300_eth_props[] __initconst = { + PROPERTY_ENTRY_U32("reg-io-width", 4), + PROPERTY_ENTRY_U32("reg-shift", 0), + PROPERTY_ENTRY_BOOL("smsc,irq-push-pull"), + PROPERTY_ENTRY_STRING("phy-mode", "mii"), + PROPERTY_ENTRY_U8_ARRAY("local-mac-address", db1300_eth_macaddr), + { } }; -static struct platform_device db1300_eth_dev = { - .name = "smsc911x", - .id = -1, - .num_resources = ARRAY_SIZE(db1300_eth_res), - .resource = db1300_eth_res, - .dev = { - .platform_data = &db1300_eth_config, - }, +static const struct platform_device_info db1300_eth_info __initconst = { + .name = "smsc911x", + .id = PLATFORM_DEVID_NONE, + .res = db1300_eth_res, + .num_res = ARRAY_SIZE(db1300_eth_res), + .properties = db1300_eth_props, }; +static void __init db1300_eth_init(void) +{ + struct platform_device *pd; + int err; + + prom_get_ethernet_addr(db1300_eth_macaddr); + + pd = platform_device_register_full(&db1300_eth_info); + err = PTR_ERR_OR_ZERO(pd); + if (err) + pr_err("failed to create eth device: %d\n", err); +} + /**********************************************************************/ static struct resource au1300_psc1_res[] = { @@ -351,67 +368,128 @@ static struct platform_device db1300_i2c_dev = { /**********************************************************************/ +static const struct property_entry db1300_5waysw_props[] = { + PROPERTY_ENTRY_BOOL("autorepeat"), + PROPERTY_ENTRY_STRING("label", "db1300-5wayswitch"), + { } +}; + /* proper key assignments when facing the LCD panel. For key assignments * according to the schematics swap up with down and left with right. * I chose to use it to emulate the arrow keys of a keyboard. */ -static struct gpio_keys_button db1300_5waysw_arrowkeys[] = { - { - .code = KEY_DOWN, - .gpio = AU1300_PIN_LCDPWM0, - .type = EV_KEY, - .debounce_interval = 1, - .active_low = 1, - .desc = "5waysw-down", - }, - { - .code = KEY_UP, - .gpio = AU1300_PIN_PSC2SYNC1, - .type = EV_KEY, - .debounce_interval = 1, - .active_low = 1, - .desc = "5waysw-up", - }, - { - .code = KEY_RIGHT, - .gpio = AU1300_PIN_WAKE3, - .type = EV_KEY, - .debounce_interval = 1, - .active_low = 1, - .desc = "5waysw-right", - }, - { - .code = KEY_LEFT, - .gpio = AU1300_PIN_WAKE2, - .type = EV_KEY, - .debounce_interval = 1, - .active_low = 1, - .desc = "5waysw-left", - }, - { - .code = KEY_ENTER, - .gpio = AU1300_PIN_WAKE1, - .type = EV_KEY, - .debounce_interval = 1, - .active_low = 1, - .desc = "5waysw-push", - }, +static const struct software_node db1300_5waysw_node = { + .name = "db1300-5wayswitch", + .properties = db1300_5waysw_props, }; -static struct gpio_keys_platform_data db1300_5waysw_data = { - .buttons = db1300_5waysw_arrowkeys, - .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys), - .rep = 1, - .name = "db1300-5wayswitch", +static const struct property_entry db1300_5waysw_down_props[] = { + PROPERTY_ENTRY_U32("linux,code", KEY_DOWN), + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, + AU1300_PIN_LCDPWM0, GPIO_ACTIVE_LOW), + PROPERTY_ENTRY_U32("debounce-interval", 1), + PROPERTY_ENTRY_STRING("label", "5waysw-down"), + { } }; -static struct platform_device db1300_5waysw_dev = { - .name = "gpio-keys", - .dev = { - .platform_data = &db1300_5waysw_data, - }, +static const struct software_node db1300_5waysw_down_node = { + .name = "5waysw-down", + .parent = &db1300_5waysw_node, + .properties = db1300_5waysw_down_props, }; +static const struct property_entry db1300_5waysw_up_props[] = { + PROPERTY_ENTRY_U32("linux,code", KEY_UP), + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, + AU1300_PIN_PSC2SYNC1, GPIO_ACTIVE_LOW), + PROPERTY_ENTRY_U32("debounce-interval", 1), + PROPERTY_ENTRY_STRING("label", "5waysw-up"), + { } +}; + +static const struct software_node db1300_5waysw_up_node = { + .name = "5waysw-up", + .parent = &db1300_5waysw_node, + .properties = db1300_5waysw_up_props, +}; + +static const struct property_entry db1300_5waysw_right_props[] = { + PROPERTY_ENTRY_U32("linux,code", KEY_RIGHT), + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, + AU1300_PIN_WAKE3, GPIO_ACTIVE_LOW), + PROPERTY_ENTRY_U32("debounce-interval", 1), + PROPERTY_ENTRY_STRING("label", "5waysw-right"), + { } +}; + +static const struct software_node db1300_5waysw_right_node = { + .name = "5waysw-right", + .parent = &db1300_5waysw_node, + .properties = db1300_5waysw_right_props, +}; + +static const struct property_entry db1300_5waysw_left_props[] = { + PROPERTY_ENTRY_U32("linux,code", KEY_LEFT), + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, + AU1300_PIN_WAKE2, GPIO_ACTIVE_LOW), + PROPERTY_ENTRY_U32("debounce-interval", 1), + PROPERTY_ENTRY_STRING("label", "5waysw-left"), + { } +}; + +static const struct software_node db1300_5waysw_left_node = { + .name = "5waysw-left", + .parent = &db1300_5waysw_node, + .properties = db1300_5waysw_left_props, +}; + +static const struct property_entry db1300_5waysw_push_props[] = { + PROPERTY_ENTRY_U32("linux,code", KEY_ENTER), + PROPERTY_ENTRY_GPIO("gpios", &alchemy_gpic_node, + AU1300_PIN_WAKE1, GPIO_ACTIVE_LOW), + PROPERTY_ENTRY_U32("debounce-interval", 1), + PROPERTY_ENTRY_STRING("label", "5waysw-push"), + { } +}; + +static const struct software_node db1300_5waysw_push_node = { + .name = "5waysw-push", + .parent = &db1300_5waysw_node, + .properties = db1300_5waysw_push_props, +}; + +static const struct software_node * const db1300_5waysw_swnodes[] __initconst = { + &db1300_5waysw_node, + &db1300_5waysw_down_node, + &db1300_5waysw_up_node, + &db1300_5waysw_right_node, + &db1300_5waysw_left_node, + &db1300_5waysw_push_node, + NULL +}; + +static void __init db1300_5waysw_init(void) +{ + const struct platform_device_info pdevinfo = { + .name = "gpio-keys", + .id = PLATFORM_DEVID_NONE, + .swnode = &db1300_5waysw_node, + }; + struct platform_device *pd; + int err; + + err = software_node_register_node_group(db1300_5waysw_swnodes); + if (err) { + pr_err("failed to register 5waysw software nodes: %d\n", err); + return; + } + + pd = platform_device_register_full(&pdevinfo); + err = PTR_ERR_OR_ZERO(pd); + if (err) + pr_err("failed to create 5waysw device: %d\n", err); +} + /**********************************************************************/ static struct pata_platform_info db1300_ide_info = { @@ -764,9 +842,7 @@ static struct platform_driver db1300_wm97xx_driver = { /**********************************************************************/ static struct platform_device *db1300_dev[] __initdata = { - &db1300_eth_dev, &db1300_i2c_dev, - &db1300_5waysw_dev, &db1300_nand_dev, &db1300_ide_dev, #ifdef CONFIG_MMC_AU1X @@ -804,8 +880,6 @@ int __init db1300_dev_setup(void) /* * setup board */ - prom_get_ethernet_addr(&db1300_eth_config.mac[0]); - i2c_register_board_info(0, db1300_i2c_devs, ARRAY_SIZE(db1300_i2c_devs)); @@ -848,6 +922,9 @@ int __init db1300_dev_setup(void) swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT; db1x_register_norflash(64 << 20, 2, swapped); + db1300_eth_init(); + db1300_5waysw_init(); + return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev)); } diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c index 6c6837181f55..b8295a5c2e9a 100644 --- a/arch/mips/alchemy/devboards/db1550.c +++ b/arch/mips/alchemy/devboards/db1550.c @@ -28,6 +28,8 @@ #include #include #include + +#include "db1xxx.h" #include "platform.h" static void __init db1550_hw_setup(void) diff --git a/arch/mips/alchemy/devboards/db1xxx.c b/arch/mips/alchemy/devboards/db1xxx.c index e6d25aad8350..2e8c68d97b34 100644 --- a/arch/mips/alchemy/devboards/db1xxx.c +++ b/arch/mips/alchemy/devboards/db1xxx.c @@ -7,16 +7,7 @@ #include #include -int __init db1000_board_setup(void); -int __init db1000_dev_setup(void); -int __init db1500_pci_setup(void); -int __init db1200_board_setup(void); -int __init db1200_dev_setup(void); -int __init db1300_board_setup(void); -int __init db1300_dev_setup(void); -int __init db1550_board_setup(void); -int __init db1550_dev_setup(void); -int __init db1550_pci_setup(int); +#include "db1xxx.h" static const char *board_type_str(void) { diff --git a/arch/mips/alchemy/devboards/db1xxx.h b/arch/mips/alchemy/devboards/db1xxx.h new file mode 100644 index 000000000000..f39e3551e3b3 --- /dev/null +++ b/arch/mips/alchemy/devboards/db1xxx.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __LINUX_MIPS_DB1XXX__ +#define __LINUX_MIPS_DB1XXX__ + +const char *get_system_type(void); +int db1000_board_setup(void); +int db1000_dev_setup(void); +int db1500_pci_setup(void); +int db1200_board_setup(void); +int db1200_dev_setup(void); +int db1300_board_setup(void); +int db1300_dev_setup(void); +int db1550_board_setup(void); +int db1550_dev_setup(void); +int db1550_pci_setup(int id); + +#endif /* __LINUX_MIPS_DB1XXX__ */ diff --git a/arch/mips/alchemy/devboards/platform.c b/arch/mips/alchemy/devboards/platform.c index 46262c823fcb..fbc93d729c50 100644 --- a/arch/mips/alchemy/devboards/platform.c +++ b/arch/mips/alchemy/devboards/platform.c @@ -20,6 +20,8 @@ #include +#include "platform.h" + void prom_putchar(char c) { if (alchemy_get_cputype() == ALCHEMY_CPU_AU1300) diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi index 6dee85909f5a..f304f99946f1 100644 --- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi +++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi @@ -19,11 +19,13 @@ pic: interrupt-controller@10000000 { #interrupt-cells = <2>; }; - rtc0: rtc@100d0100 { - compatible = "loongson,ls7a-rtc"; - reg = <0 0x100d0100 0 0x78>; + lpc: interrupt-controller@10002000 { + compatible = "loongson,ls7a-lpc"; + reg = <0 0x10002000 0 0x1000>; + interrupt-controller; interrupt-parent = <&pic>; - interrupts = <52 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; }; ls7a_uart0: serial@10080000 { @@ -65,6 +67,13 @@ ls7a_uart3: serial@10080300 { no-loopback-test; }; + rtc0: rtc@100d0100 { + compatible = "loongson,ls7a-rtc"; + reg = <0 0x100d0100 0 0x78>; + interrupt-parent = <&pic>; + interrupts = <52 IRQ_TYPE_LEVEL_HIGH>; + }; + pci@1a000000 { compatible = "loongson,ls7a-pci"; device_type = "pci"; diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi index c1ca03a27b6c..b4a95b0b9b39 100644 --- a/arch/mips/boot/dts/qca/ar9132.dtsi +++ b/arch/mips/boot/dts/qca/ar9132.dtsi @@ -98,7 +98,7 @@ pll: pll-controller@18050000 { clock-output-names = "cpu", "ddr", "ahb"; }; - wdt: wdt@18060008 { + wdt: watchdog@18060008 { compatible = "qca,ar7130-wdt"; reg = <0x18060008 0x8>; diff --git a/arch/mips/configs/fuloong2e_defconfig b/arch/mips/configs/fuloong2e_defconfig index 405799a9ed2a..8c80c690624c 100644 --- a/arch/mips/configs/fuloong2e_defconfig +++ b/arch/mips/configs/fuloong2e_defconfig @@ -89,7 +89,6 @@ CONFIG_MTD_CFI_STAA=m CONFIG_MTD_PHYSMAP=m CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=m -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SR=y diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 822cc1ed64c2..009e66299b69 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig @@ -177,7 +177,6 @@ CONFIG_NET_ACT_SIMP=m CONFIG_NET_ACT_SKBEDIT=m CONFIG_RFKILL=m CONFIG_CONNECTOR=m -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_RAID_ATTRS=m CONFIG_SCSI=y diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index d108fd7b752b..ac885ff5b712 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -83,7 +83,6 @@ CONFIG_CFG80211=m CONFIG_MAC80211=m CONFIG_RFKILL=m CONFIG_BLK_DEV_LOOP=y -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y diff --git a/arch/mips/configs/ip30_defconfig b/arch/mips/configs/ip30_defconfig index 028286029877..93eb90efe06e 100644 --- a/arch/mips/configs/ip30_defconfig +++ b/arch/mips/configs/ip30_defconfig @@ -77,7 +77,6 @@ CONFIG_NET_ACT_PEDIT=m CONFIG_NET_ACT_SKBEDIT=m # CONFIG_VGA_ARB is not set CONFIG_BLK_DEV_LOOP=y -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig index a790c2610fd3..dd3486b8d1fc 100644 --- a/arch/mips/configs/jazz_defconfig +++ b/arch/mips/configs/jazz_defconfig @@ -33,7 +33,6 @@ CONFIG_BLK_DEV_FD=m CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=m -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_RAID_ATTRS=m CONFIG_SCSI=y diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index 89d7c47ca7f0..56a8f76dab41 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig @@ -223,7 +223,6 @@ CONFIG_BLK_DEV_FD=m CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=y -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_RAID_ATTRS=m CONFIG_BLK_DEV_SD=y diff --git a/arch/mips/configs/malta_kvm_defconfig b/arch/mips/configs/malta_kvm_defconfig index 39c69af12adc..85e95c0ae410 100644 --- a/arch/mips/configs/malta_kvm_defconfig +++ b/arch/mips/configs/malta_kvm_defconfig @@ -227,7 +227,6 @@ CONFIG_BLK_DEV_FD=m CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=y -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_RAID_ATTRS=m CONFIG_BLK_DEV_SD=y diff --git a/arch/mips/configs/maltaup_xpa_defconfig b/arch/mips/configs/maltaup_xpa_defconfig index 0e207bb0f794..0498a0115349 100644 --- a/arch/mips/configs/maltaup_xpa_defconfig +++ b/arch/mips/configs/maltaup_xpa_defconfig @@ -225,7 +225,6 @@ CONFIG_BLK_DEV_FD=m CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=y -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_RAID_ATTRS=m CONFIG_BLK_DEV_SD=y diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index 291c6644035d..09e006c7cd7c 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig @@ -177,7 +177,6 @@ CONFIG_PARIDE_ON26=m CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=m -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_RAID_ATTRS=m CONFIG_SCSI=y diff --git a/arch/mips/configs/sb1250_swarm_defconfig b/arch/mips/configs/sb1250_swarm_defconfig index a5b66b9f6d39..f56d3cf78891 100644 --- a/arch/mips/configs/sb1250_swarm_defconfig +++ b/arch/mips/configs/sb1250_swarm_defconfig @@ -43,7 +43,6 @@ CONFIG_FW_LOADER=m CONFIG_CONNECTOR=m CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=9220 -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_RAID_ATTRS=m CONFIG_BLK_DEV_SD=y diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S index 011d1d678840..a0b439c90488 100644 --- a/arch/mips/dec/int-handler.S +++ b/arch/mips/dec/int-handler.S @@ -277,7 +277,7 @@ srlv t3,t1,t2 handle_it: - j dec_irq_dispatch + j do_IRQ nop #if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT) diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index 971f7b46759b..c690ef33397f 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -78,10 +78,7 @@ static struct irq_chip ioasic_dma_irq_type = { * cleared. This cannot be done until after a corrective action has been * taken and this also means they will not retrigger. Therefore they use * the `handle_fasteoi_irq' handler that only clears the request on the - * way out. Because MIPS processor interrupt inputs, one of which the I/O - * ASIC is cascaded to, are level-triggered it is recommended that error - * DMA interrupt action handlers are registered with the IRQF_ONESHOT flag - * set so that they are run with the interrupt line masked. + * way out. * * This mask has `1' bits in the positions of informational interrupts. */ diff --git a/arch/mips/dec/prom/console.c b/arch/mips/dec/prom/console.c index 31a8441d8431..b4f0dba3fa20 100644 --- a/arch/mips/dec/prom/console.c +++ b/arch/mips/dec/prom/console.c @@ -2,8 +2,9 @@ /* * DECstation PROM-based early console support. * - * Copyright (C) 2004, 2007 Maciej W. Rozycki + * Copyright (C) 2004, 2007, 2026 Maciej W. Rozycki */ +#include #include #include #include @@ -14,9 +15,11 @@ static void __init prom_console_write(struct console *con, const char *s, unsigned int c) { - char buf[81]; + static char buf[81] __initdata = { 0 }; unsigned int chunk = sizeof(buf) - 1; + BUG_ON((long)buf != (int)(long)buf); + while (c > 0) { if (chunk > c) chunk = c; diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c index 8d74d7d6c05b..e46c7accefff 100644 --- a/arch/mips/dec/prom/init.c +++ b/arch/mips/dec/prom/init.c @@ -3,7 +3,7 @@ * init.c: PROM library initialisation code. * * Copyright (C) 1998 Harald Koerfgen - * Copyright (C) 2002, 2004 Maciej W. Rozycki + * Copyright (C) 2002, 2004, 2026 Maciej W. Rozycki */ #include #include @@ -20,6 +20,10 @@ #include +#ifdef CONFIG_64BIT +unsigned long o32_stk[O32_STK_SIZE] __initdata = { 0 }; +#endif + int (*__rex_bootinit)(void); int (*__rex_bootread)(void); int (*__rex_getbitmap)(memmap *); diff --git a/arch/mips/dec/reset.c b/arch/mips/dec/reset.c index 3df01f1da347..ee1ad38f4a69 100644 --- a/arch/mips/dec/reset.c +++ b/arch/mips/dec/reset.c @@ -10,6 +10,8 @@ #include +#include + typedef void __noreturn (* noret_func_t)(void); static inline void __noreturn back_to_prom(void) diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index 87f0a1436bf9..78ad28ac16db 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c @@ -48,14 +48,10 @@ #include #include #include +#include #include -extern void dec_machine_restart(char *command); -extern void dec_machine_halt(void); -extern void dec_machine_power_off(void); -extern irqreturn_t dec_intr_halt(int irq, void *dev_id); - unsigned long dec_kn_slot_base, dec_kn_slot_size; EXPORT_SYMBOL(dec_kn_slot_base); @@ -776,9 +772,3 @@ void __init arch_init_irq(void) pr_err("Failed to register halt interrupt\n"); } } - -asmlinkage unsigned int dec_irq_dispatch(unsigned int irq) -{ - do_IRQ(irq); - return 0; -} diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S index ee856709e0b6..77533cfbdfc1 100644 --- a/arch/mips/fw/lib/call_o32.S +++ b/arch/mips/fw/lib/call_o32.S @@ -74,7 +74,7 @@ NESTED(call_o32, O32_FRAMESZ, ra) PTR_LA t1,6*O32_SZREG(fp) li t2,O32_ARGC-6 1: - lw t3,(t0) + ld t3,(t0) REG_ADDU t0,SZREG sw t3,(t1) REG_SUBU t2,1 diff --git a/arch/mips/include/asm/dec/prom.h b/arch/mips/include/asm/dec/prom.h index 8fcad6984389..af068e634f1e 100644 --- a/arch/mips/include/asm/dec/prom.h +++ b/arch/mips/include/asm/dec/prom.h @@ -4,7 +4,7 @@ * * DECstation PROM interface. * - * Copyright (C) 2002 Maciej W. Rozycki + * Copyright (C) 2002, 2026 Maciej W. Rozycki * * Based on arch/mips/dec/prom/prom.h by the Anonymous. */ @@ -97,6 +97,17 @@ extern int (*__pmax_close)(int); #ifdef CONFIG_64BIT +#define O32_STK_SIZE 512 +extern unsigned long o32_stk[]; + +/* Switch the stack if outside the 32-bit address space. */ +static inline unsigned long *o32_get_stk(void) +{ + long fp = (long)__builtin_frame_address(0); + + return fp != (int)fp ? o32_stk + O32_STK_SIZE : NULL; +} + /* * On MIPS64 we have to call PROM functions via a helper * dispatcher to accommodate ABI incompatibilities. @@ -128,7 +139,7 @@ int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), void *, char *, ...)); #define prom_getchar() _prom_getchar(__prom_getchar, NULL) #define prom_getenv(x) _prom_getenv(__prom_getenv, NULL, x) -#define prom_printf(x...) _prom_printf(__prom_printf, NULL, x) +#define prom_printf(x...) _prom_printf(__prom_printf, o32_get_stk(), x) #else /* !CONFIG_64BIT */ diff --git a/arch/mips/include/asm/dec/reset.h b/arch/mips/include/asm/dec/reset.h new file mode 100644 index 000000000000..6af49f3f24da --- /dev/null +++ b/arch/mips/include/asm/dec/reset.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * arch/mips/include/asm/dec/reset.h + * + * DECstation/DECsystem halt/reset support. + * + * Copyright (C) 2026 Maciej W. Rozycki + */ +#ifndef __ASM_DEC_RESET_H +#define __ASM_DEC_RESET_H + +#include + +void __noreturn dec_machine_restart(char *command); +void __noreturn dec_machine_halt(void); +void __noreturn dec_machine_power_off(void); +irqreturn_t dec_intr_halt(int irq, void *dev_id); + +#endif /* __ASM_DEC_RESET_H */ diff --git a/arch/mips/include/asm/gio_device.h b/arch/mips/include/asm/gio_device.h index 159087f5386e..f9c102f038d6 100644 --- a/arch/mips/include/asm/gio_device.h +++ b/arch/mips/include/asm/gio_device.h @@ -37,12 +37,6 @@ extern void gio_dev_put(struct gio_device *); extern int gio_device_register(struct gio_device *); extern void gio_device_unregister(struct gio_device *); -extern void gio_release_dev(struct device *); - -static inline void gio_device_free(struct gio_device *dev) -{ - gio_release_dev(&dev->dev); -} extern int gio_register_driver(struct gio_driver *); extern void gio_unregister_driver(struct gio_driver *); diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 3a848e7e69f7..ee5f5245c04a 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h @@ -54,7 +54,7 @@ static inline int irq_canonicalize(int irq) asmlinkage void plat_irq_dispatch(void); -extern void do_IRQ(unsigned int irq); +asmlinkage void do_IRQ(unsigned int irq); struct irq_domain; extern void do_domain_IRQ(struct irq_domain *domain, unsigned int irq); diff --git a/arch/mips/include/asm/mach-ath79/kmalloc.h b/arch/mips/include/asm/mach-ath79/kmalloc.h new file mode 100644 index 000000000000..954f5d6e0dd0 --- /dev/null +++ b/arch/mips/include/asm/mach-ath79/kmalloc.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_MACH_ATH79_KMALLOC_H +#define __ASM_MACH_ATH79_KMALLOC_H + +#define ARCH_DMA_MINALIGN L1_CACHE_BYTES + +#endif /* __ASM_MACH_ATH79_KMALLOC_H */ diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h index e6306f6820e6..de7f857cb333 100644 --- a/arch/mips/include/asm/mach-au1x00/gpio-au1000.h +++ b/arch/mips/include/asm/mach-au1x00/gpio-au1000.h @@ -40,6 +40,11 @@ #define AU1000_GPIO2_INTENABLE 0x10 #define AU1000_GPIO2_ENABLE 0x14 +struct software_node; + +extern const struct software_node alchemy_gpio1_node; +extern const struct software_node alchemy_gpio2_node; + static inline int au1000_gpio1_to_irq(int gpio) { return MAKE_IRQ(1, gpio - ALCHEMY_GPIO1_BASE); diff --git a/arch/mips/include/asm/mach-au1x00/gpio-au1300.h b/arch/mips/include/asm/mach-au1x00/gpio-au1300.h index b12f37262cfa..c92d3c2a5ef8 100644 --- a/arch/mips/include/asm/mach-au1x00/gpio-au1300.h +++ b/arch/mips/include/asm/mach-au1x00/gpio-au1300.h @@ -13,6 +13,9 @@ #include struct gpio_chip; +struct software_node; + +extern const struct software_node alchemy_gpic_node; /* with the current GPIC design, up to 128 GPIOs are possible. * The only implementation so far is in the Au1300, which has 75 externally diff --git a/arch/mips/include/asm/mach-ralink/kmalloc.h b/arch/mips/include/asm/mach-ralink/kmalloc.h new file mode 100644 index 000000000000..1693209d3f37 --- /dev/null +++ b/arch/mips/include/asm/mach-ralink/kmalloc.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_MACH_RALINK_KMALLOC_H +#define __ASM_MACH_RALINK_KMALLOC_H + +#ifdef CONFIG_DMA_NONCOHERENT +#define ARCH_DMA_MINALIGN L1_CACHE_BYTES +#endif + +#endif /* __ASM_MACH_RALINK_KMALLOC_H */ diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S index 2ae7034a3d5c..70413c816eb0 100644 --- a/arch/mips/kernel/cps-vec.S +++ b/arch/mips/kernel/cps-vec.S @@ -373,8 +373,11 @@ LEAF(mips_cps_boot_vpes) .set pop PTR_LA t1, 1f + .set push + .set MIPS_ISA_LEVEL_RAW jr.hb t1 nop + .set pop 1: mfc0 t1, CP0_MVPCONTROL ori t1, t1, MVPCONTROL_VPC mtc0 t1, CP0_MVPCONTROL @@ -487,8 +490,11 @@ LEAF(mips_cps_boot_vpes) li t0, TCHALT_H mtc0 t0, CP0_TCHALT PTR_LA t0, 1f + .set push + .set MIPS_ISA_LEVEL_RAW 1: jr.hb t0 nop + .set pop 2: diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 5e11582fe308..4ed73784a800 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -100,7 +100,7 @@ static inline void check_stack_overflow(void) {} * SMP cross-CPU interrupts have their own specific * handlers). */ -void __irq_entry do_IRQ(unsigned int irq) +asmlinkage void __irq_entry do_IRQ(unsigned int irq) { irq_enter(); check_stack_overflow(); diff --git a/arch/mips/kernel/mips-mt-fpaff.c b/arch/mips/kernel/mips-mt-fpaff.c index 10172fc4f627..4fead87d2f43 100644 --- a/arch/mips/kernel/mips-mt-fpaff.c +++ b/arch/mips/kernel/mips-mt-fpaff.c @@ -71,11 +71,16 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, struct task_struct *p; int retval; - if (len < sizeof(new_mask)) - return -EINVAL; - - if (copy_from_user(&new_mask, user_mask_ptr, sizeof(new_mask))) - return -EFAULT; + if (!alloc_cpumask_var(&new_mask, GFP_KERNEL)) + return -ENOMEM; + if (len < cpumask_size()) + cpumask_clear(new_mask); + else if (len > cpumask_size()) + len = cpumask_size(); + if (copy_from_user(new_mask, user_mask_ptr, len)) { + retval = -EFAULT; + goto out_free_new_mask; + } cpus_read_lock(); rcu_read_lock(); @@ -84,7 +89,8 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, if (!p) { rcu_read_unlock(); cpus_read_unlock(); - return -ESRCH; + retval = -ESRCH; + goto out_free_new_mask; } /* Prevent p going away */ @@ -95,13 +101,9 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, retval = -ENOMEM; goto out_put_task; } - if (!alloc_cpumask_var(&new_mask, GFP_KERNEL)) { - retval = -ENOMEM; - goto out_free_cpus_allowed; - } if (!alloc_cpumask_var(&effective_mask, GFP_KERNEL)) { retval = -ENOMEM; - goto out_free_new_mask; + goto out_free_cpus_allowed; } if (!check_same_owner(p) && !capable(CAP_SYS_NICE)) { retval = -EPERM; @@ -142,13 +144,13 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, } out_unlock: free_cpumask_var(effective_mask); -out_free_new_mask: - free_cpumask_var(new_mask); out_free_cpus_allowed: free_cpumask_var(cpus_allowed); out_put_task: put_task_struct(p); cpus_read_unlock(); +out_free_new_mask: + free_cpumask_var(new_mask); return retval; } diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 8f0a0001540c..5401c679813a 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -79,7 +79,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) for (i = 0; i < cpu_data[n].watch_reg_count; i++) seq_printf(m, "%s0x%04x", i ? ", " : "", cpu_data[n].watch_reg_masks[i]); - seq_puts(m, "]"); + seq_putc(m, ']'); } seq_puts(m, "\nisa\t\t\t:"); @@ -150,12 +150,11 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_puts(m, " loongson-ext"); if (cpu_has_loongson_ext2) seq_puts(m, " loongson-ext2"); - seq_puts(m, "\n"); + seq_putc(m, '\n'); - if (cpu_has_mmips) { + if (cpu_has_mmips) seq_printf(m, "micromips kernel\t: %s\n", str_yes_no(read_c0_config3() & MIPS_CONF3_ISA_OE)); - } seq_puts(m, "Options implemented\t:"); if (cpu_has_tlb) @@ -301,7 +300,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) raw_notifier_call_chain(&proc_cpuinfo_chain, 0, &proc_cpuinfo_notifier_args); - seq_puts(m, "\n"); + seq_putc(m, '\n'); return 0; } diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 4868e79f3b30..0f28b4a62e72 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -422,6 +423,7 @@ static void stop_this_cpu(void *dummy) set_cpu_online(smp_processor_id(), false); calculate_cpu_foreign_map(); local_irq_disable(); + rcutree_report_cpu_dead(); while (1); } diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S index a4b4e805ff13..84f85aba6f4b 100644 --- a/arch/mips/lib/memcpy.S +++ b/arch/mips/lib/memcpy.S @@ -274,7 +274,6 @@ /* initialize __memcpy if this the first time we execute this macro */ .ifnotdef __memcpy .set __memcpy, 1 - .hidden __memcpy /* make sure it does not leak */ .endif /* @@ -538,7 +537,6 @@ .if __memcpy == 1 END(memcpy) .set __memcpy, 0 - .hidden __memcpy .endif .Ll_exc_copy\@: diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S index 79405c32cc85..ab087406da66 100644 --- a/arch/mips/lib/memset.S +++ b/arch/mips/lib/memset.S @@ -89,7 +89,6 @@ /* Initialize __memset if this is the first time we call this macro */ .ifnotdef __memset .set __memset, 1 - .hidden __memset /* Make sure it does not leak */ .endif sltiu t0, a2, STORSIZE /* very small region? */ @@ -231,7 +230,6 @@ .if __memset == 1 END(memset) .set __memset, 0 - .hidden __memset .endif #ifdef CONFIG_CPU_NO_LOAD_STORE_LR diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 10413b6f6662..d8aadd3dc057 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1757,11 +1757,6 @@ void r4k_cache_init(void) build_clear_page(); build_copy_page(); - /* - * We want to run CMP kernels on core with and without coherent - * caches. Therefore, do not use CONFIG_MIPS_CMP to decide whether - * or not to flush caches. - */ local_r4k___flush_cache_all(NULL); coherency_setup(); diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 55b25e85122a..1c07ca84ee21 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -272,9 +272,15 @@ static int maar_res_walk(unsigned long start_pfn, unsigned long nr_pages, void *data) { struct maar_walk_info *wi = data; - struct maar_config *cfg = &wi->cfg[wi->num_cfg]; + struct maar_config *cfg; unsigned int maar_align; + /* Ensure we don't overflow the cfg array */ + if (WARN_ON(wi->num_cfg >= ARRAY_SIZE(wi->cfg))) + return -1; + + cfg = &wi->cfg[wi->num_cfg]; + /* MAAR registers hold physical addresses right shifted by 4 bits */ maar_align = BIT(MIPS_MAAR_ADDR_SHIFT + 4); @@ -283,9 +289,7 @@ static int maar_res_walk(unsigned long start_pfn, unsigned long nr_pages, cfg->upper = ALIGN_DOWN(PFN_PHYS(start_pfn + nr_pages), maar_align) - 1; cfg->attrs = MIPS_MAAR_S; - /* Ensure we don't overflow the cfg array */ - if (!WARN_ON(wi->num_cfg >= ARRAY_SIZE(wi->cfg))) - wi->num_cfg++; + wi->num_cfg++; return 0; } diff --git a/arch/mips/n64/init.c b/arch/mips/n64/init.c index dfbd864f4667..66ec28ab41f3 100644 --- a/arch/mips/n64/init.c +++ b/arch/mips/n64/init.c @@ -50,7 +50,7 @@ void __init prom_init(void) #define W 320 #define H 240 -#define REG_BASE ((u32 *) CKSEG1ADDR(0x4400000)) +#define REG_BASE ((u32 __iomem *) CKSEG1ADDR(0x4400000)) static void __init n64rdp_write_reg(const u8 reg, const u32 value) { diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c index a4bdda8541c0..ae7b8cfedd5f 100644 --- a/arch/mips/ralink/mt7621.c +++ b/arch/mips/ralink/mt7621.c @@ -63,7 +63,7 @@ phys_addr_t mips_cpc_default_phys_base(void) static bool __init mt7621_addr_wraparound_test(phys_addr_t size) { - void *dm = (void *)KSEG1ADDR(&detect_magic); + void __iomem *dm = (void __iomem *)KSEG1ADDR(&detect_magic); if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE) return true; diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c index c3d8d96d0ef5..a6e3dc11298b 100644 --- a/arch/mips/rb532/devices.c +++ b/arch/mips/rb532/devices.c @@ -240,6 +240,25 @@ static struct platform_device *rb532_devs[] = { &rb532_wdt }; +#define GPIOBASE 0x050000 + +static struct resource rb532_gpio_reg0_res[] = { + { + .name = "gpio_reg0", + .start = REGBASE + GPIOBASE, + .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device_info rb532_gpio_devinfo = { + .name = "rb532-gpio", + .id = PLATFORM_DEVID_NONE, + .res = rb532_gpio_reg0_res, + .num_res = ARRAY_SIZE(rb532_gpio_reg0_res), + .swnode = &rb532_gpio0_node, +}; + static const struct property_entry rb532_button_properties[] = { PROPERTY_ENTRY_GPIO("button-gpios", &rb532_gpio0_node, GPIO_BTN_S1, GPIO_ACTIVE_LOW), @@ -309,17 +328,18 @@ static int __init plat_setup_devices(void) /* set the uart clock to the current cpu frequency */ rb532_uart_res[0].uartclk = idt_cpu_freq; + pd = platform_device_register_full(&rb532_gpio_devinfo); + ret = PTR_ERR_OR_ZERO(pd); + if (ret) { + pr_err("failed to create the GPIO device: %d\n", ret); + return ret; + } + gpiod_add_lookup_table(&cf_slot0_gpio_table); ret = platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs)); if (ret) return ret; - /* - * Stack devices using full info and properties here, after we - * register the node for the GPIO chip. - */ - software_node_register(&rb532_gpio0_node); - pd = platform_device_register_full(&nand0_info); ret = PTR_ERR_OR_ZERO(pd); if (ret) { diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 9aa5ef374465..49e1a15a3827 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -37,7 +37,6 @@ #include #include -#define GPIOBASE 0x050000 /* Offsets relative to GPIOBASE */ #define GPIOFUNC 0x00 #define GPIOCFG 0x04 @@ -52,15 +51,6 @@ struct rb532_gpio_chip { void __iomem *regbase; }; -static struct resource rb532_gpio_reg0_res[] = { - { - .name = "gpio_reg0", - .start = REGBASE + GPIOBASE, - .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1, - .flags = IORESOURCE_MEM, - } -}; - /* rb532_set_bit - sanely set a bit * * bitval: new value for the bit @@ -199,21 +189,32 @@ void rb532_gpio_set_func(unsigned gpio) } EXPORT_SYMBOL(rb532_gpio_set_func); -static int __init rb532_gpio_init(void) +static int rb532_gpio_probe(struct platform_device *pdev) { - struct resource *r; + struct device *dev = &pdev->dev; + struct resource *res; - r = rb532_gpio_reg0_res; - rb532_gpio_chip->regbase = ioremap(r->start, resource_size(r)); + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -EINVAL; - if (!rb532_gpio_chip->regbase) { - printk(KERN_ERR "rb532: cannot remap GPIO register 0\n"); - return -ENXIO; - } + rb532_gpio_chip->regbase = devm_ioremap_resource(dev, res); + if (IS_ERR(rb532_gpio_chip->regbase)) + return PTR_ERR(rb532_gpio_chip->regbase); /* Register our GPIO chip */ - gpiochip_add_data(&rb532_gpio_chip->chip, rb532_gpio_chip); + return devm_gpiochip_add_data(dev, &rb532_gpio_chip->chip, rb532_gpio_chip); +} - return 0; +static struct platform_driver rb532_gpio_driver = { + .driver = { + .name = "rb532-gpio", + }, + .probe = rb532_gpio_probe, +}; + +static int __init rb532_gpio_init(void) +{ + return platform_driver_register(&rb532_gpio_driver); } arch_initcall(rb532_gpio_init); diff --git a/arch/mips/rb532/serial.c b/arch/mips/rb532/serial.c index 70482540b3db..228eff07e5e8 100644 --- a/arch/mips/rb532/serial.c +++ b/arch/mips/rb532/serial.c @@ -45,7 +45,7 @@ static struct uart_port rb532_uart = { .regshift = 2 }; -int __init setup_serial_port(void) +static int __init setup_serial_port(void) { rb532_uart.uartclk = idt_cpu_freq; diff --git a/arch/mips/sgi-ip22/ip22-gio.c b/arch/mips/sgi-ip22/ip22-gio.c index 9eec8842ffb7..54e17c8693e2 100644 --- a/arch/mips/sgi-ip22/ip22-gio.c +++ b/arch/mips/sgi-ip22/ip22-gio.c @@ -28,15 +28,7 @@ static struct { { .name = "SGI GR2/GR3", .id = 0x7f }, }; -static void gio_bus_release(struct device *dev) -{ - kfree(dev); -} - -static struct device gio_bus = { - .init_name = "gio", - .release = &gio_bus_release, -}; +static struct device *gio_bus; /** * gio_match_device - Tell if an of_device structure has a matching @@ -88,19 +80,20 @@ EXPORT_SYMBOL_GPL(gio_dev_put); * Will be called only by the device core when all users of this gio device are * done. */ -void gio_release_dev(struct device *dev) +static void gio_release_dev(struct device *dev) { struct gio_device *giodev; giodev = to_gio_device(dev); kfree(giodev); } -EXPORT_SYMBOL_GPL(gio_release_dev); int gio_device_register(struct gio_device *giodev) { giodev->dev.bus = &gio_bus_type; - giodev->dev.parent = &gio_bus; + giodev->dev.parent = gio_bus; + giodev->dev.release = gio_release_dev; + return device_register(&giodev->dev); } EXPORT_SYMBOL_GPL(gio_device_register); @@ -132,13 +125,9 @@ static int gio_device_probe(struct device *dev) if (!drv->probe) return error; - gio_dev_get(gio_dev); - match = gio_match_device(drv->id_table, gio_dev); if (match) error = drv->probe(gio_dev, match); - if (error) - gio_dev_put(gio_dev); return error; } @@ -400,11 +389,9 @@ static int __init ip22_gio_init(void) unsigned int pbdma __maybe_unused; int ret; - ret = device_register(&gio_bus); - if (ret) { - put_device(&gio_bus); - return ret; - } + gio_bus = root_device_register("gio"); + if (IS_ERR(gio_bus)) + return PTR_ERR(gio_bus); ret = bus_register(&gio_bus_type); if (!ret) { @@ -423,8 +410,9 @@ static int __init ip22_gio_init(void) ip22_check_gio(1, GIO_SLOT_EXP0_BASE, SGI_GIOEXP0_IRQ); ip22_check_gio(2, GIO_SLOT_EXP1_BASE, SGI_GIOEXP1_IRQ); } - } else - device_unregister(&gio_bus); + } else { + root_device_unregister(gio_bus); + } return ret; } diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 7335efa4d528..92b759a434c0 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig @@ -37,6 +37,7 @@ config SOC_TX4927 select IRQ_TXX9 select PCI_TX4927 select GPIO_TXX9 + select GPIOLIB_LEGACY config SOC_TX4938 bool diff --git a/arch/mips/vdso/vdso.lds.S b/arch/mips/vdso/vdso.lds.S index 05badf3ae0ff..278ab6444e98 100644 --- a/arch/mips/vdso/vdso.lds.S +++ b/arch/mips/vdso/vdso.lds.S @@ -56,6 +56,7 @@ SECTIONS .dynamic : { *(.dynamic) } :text :dynamic .rodata : { *(.rodata*) } :text + .got : { *(.got) } _end = .; PROVIDE(end = .); diff --git a/include/linux/jz4740-adc.h b/include/linux/jz4740-adc.h deleted file mode 100644 index 19d995c8bf06..000000000000 --- a/include/linux/jz4740-adc.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ - -#ifndef __LINUX_JZ4740_ADC -#define __LINUX_JZ4740_ADC - -struct device; - -/* - * jz4740_adc_set_config - Configure a JZ4740 adc device - * @dev: Pointer to a jz4740-adc device - * @mask: Mask for the config value to be set - * @val: Value to be set - * - * This function can be used by the JZ4740 ADC mfd cells to configure their - * options in the shared config register. -*/ -int jz4740_adc_set_config(struct device *dev, uint32_t mask, uint32_t val); - -#define JZ_ADC_CONFIG_SPZZ BIT(31) -#define JZ_ADC_CONFIG_EX_IN BIT(30) -#define JZ_ADC_CONFIG_DNUM_MASK (0x7 << 16) -#define JZ_ADC_CONFIG_DMA_ENABLE BIT(15) -#define JZ_ADC_CONFIG_XYZ_MASK (0x2 << 13) -#define JZ_ADC_CONFIG_SAMPLE_NUM_MASK (0x7 << 10) -#define JZ_ADC_CONFIG_CLKDIV_MASK (0xf << 5) -#define JZ_ADC_CONFIG_BAT_MB BIT(4) - -#define JZ_ADC_CONFIG_DNUM(dnum) ((dnum) << 16) -#define JZ_ADC_CONFIG_XYZ_OFFSET(dnum) ((xyz) << 13) -#define JZ_ADC_CONFIG_SAMPLE_NUM(x) ((x) << 10) -#define JZ_ADC_CONFIG_CLKDIV(div) ((div) << 5) - -#endif diff --git a/include/linux/power/jz4740-battery.h b/include/linux/power/jz4740-battery.h deleted file mode 100644 index 10da211678c8..000000000000 --- a/include/linux/power/jz4740-battery.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2009, Jiejing Zhang - */ - -#ifndef __JZ4740_BATTERY_H -#define __JZ4740_BATTERY_H - -struct jz_battery_platform_data { - struct power_supply_info info; - int gpio_charge; /* GPIO port of Charger state */ - int gpio_charge_active_low; -}; - -#endif