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iio: adc: ad9467: support write/read offset via _calibbias

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Support configuring output calibration value. Among the devices
currently supported by this driver, this setting is specific to
ad9434. The offset can be used to calibrate the output against
a known input. The register is called offset, but the procedure
is best mapped internally with calibbias operation.

Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Tomas Melin 2025-12-03 09:28:12 +00:00 committed by Jonathan Cameron
parent c7f9c36b79
commit 0820dd9f51
1 changed files with 59 additions and 1 deletions
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60
drivers/iio/adc/ad9467.c
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@ -145,6 +145,7 @@ struct ad9467_chip_info {
unsigned int num_lanes;
unsigned int dco_en;
unsigned int test_points;
const int *offset_range;
/* data clock output */
bool has_dco;
bool has_dco_invert;
@ -234,6 +235,10 @@ static int ad9467_reg_access(struct iio_dev *indio_dev, unsigned int reg,
return 0;
}
static const int ad9434_offset_range[] = {
-128, 1, 127,
};
static const unsigned int ad9265_scale_table[][2] = {
{1250, 0x00}, {1500, 0x40}, {1750, 0x80}, {2000, 0xC0},
};
@ -298,7 +303,24 @@ static void __ad9467_get_scale(struct ad9467_state *st, int index,
}
static const struct iio_chan_spec ad9434_channels[] = {
AD9467_CHAN(0, BIT(IIO_CHAN_INFO_SCALE), 0, 12, 's'),
{
.type = IIO_VOLTAGE,
.indexed = 1,
.channel = 0,
.info_mask_shared_by_type =
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_SAMP_FREQ) |
BIT(IIO_CHAN_INFO_CALIBBIAS),
.info_mask_shared_by_type_available =
BIT(IIO_CHAN_INFO_SCALE) |
BIT(IIO_CHAN_INFO_CALIBBIAS),
.scan_index = 0,
.scan_type = {
.sign = 's',
.realbits = 12,
.storagebits = 16,
},
},
};
static const struct iio_chan_spec ad9467_channels[] = {
@ -367,6 +389,7 @@ static const struct ad9467_chip_info ad9434_chip_tbl = {
.default_output_mode = AD9434_DEF_OUTPUT_MODE,
.vref_mask = AD9434_REG_VREF_MASK,
.num_lanes = 6,
.offset_range = ad9434_offset_range,
};
static const struct ad9467_chip_info ad9265_chip_tbl = {
@ -499,6 +522,33 @@ static int ad9467_set_scale(struct ad9467_state *st, int val, int val2)
return -EINVAL;
}
static int ad9467_get_offset(struct ad9467_state *st, int *val)
{
int ret;
ret = ad9467_spi_read(st, AN877_ADC_REG_OFFSET);
if (ret < 0)
return ret;
*val = ret;
return IIO_VAL_INT;
}
static int ad9467_set_offset(struct ad9467_state *st, int val)
{
int ret;
if (val < st->info->offset_range[0] || val > st->info->offset_range[2])
return -EINVAL;
ret = ad9467_spi_write(st, AN877_ADC_REG_OFFSET, val);
if (ret < 0)
return ret;
return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER,
AN877_ADC_TRANSFER_SYNC);
}
static int ad9467_outputmode_set(struct ad9467_state *st, unsigned int mode)
{
int ret;
@ -802,6 +852,8 @@ static int ad9467_read_raw(struct iio_dev *indio_dev,
struct ad9467_state *st = iio_priv(indio_dev);
switch (m) {
case IIO_CHAN_INFO_CALIBBIAS:
return ad9467_get_offset(st, val);
case IIO_CHAN_INFO_SCALE:
return ad9467_get_scale(st, val, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
@ -836,6 +888,8 @@ static int ad9467_write_raw(struct iio_dev *indio_dev,
int ret;
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
return ad9467_set_offset(st, val);
case IIO_CHAN_INFO_SCALE:
return ad9467_set_scale(st, val, val2);
case IIO_CHAN_INFO_SAMP_FREQ:
@ -874,6 +928,10 @@ static int ad9467_read_avail(struct iio_dev *indio_dev,
const struct ad9467_chip_info *info = st->info;
switch (mask) {
case IIO_CHAN_INFO_CALIBBIAS:
*type = IIO_VAL_INT;
*vals = info->offset_range;
return IIO_AVAIL_RANGE;
case IIO_CHAN_INFO_SCALE:
*vals = (const int *)st->scales;
*type = IIO_VAL_INT_PLUS_MICRO;