drm/rockchip: vop2: Enforce AFBC transform stride align in plane_check

Make sure we can't break the hardware by requesting an unsupported
configuration.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20251215-vop2-atomic-fixups-v5-6-83463c075a8d@collabora.com
This commit is contained in:
Daniel Stone 2025-12-15 15:09:22 +01:00 committed by Heiko Stuebner
parent 8cdd4d858d
commit 081676de4a

View File

@ -1083,6 +1083,15 @@ static int vop2_plane_atomic_check(struct drm_plane *plane,
return -EINVAL;
}
if (drm_is_afbc(fb->modifier) &&
pstate->rotation &
(DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270) &&
(fb->pitches[0] << 3) / vop2_get_bpp(fb->format) % 64) {
drm_dbg_kms(vop2->drm,
"AFBC buffers must be 64-pixel aligned for horizontal rotation or mirroring\n");
return -EINVAL;
}
return 0;
}
@ -1290,9 +1299,6 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
* with WIN_VIR_STRIDE.
*/
stride = (fb->pitches[0] << 3) / bpp;
if ((stride & 0x3f) && (xmirror || rotate_90 || rotate_270))
drm_dbg_kms(vop2->drm, "vp%d %s stride[%d] not 64 pixel aligned\n",
vp->id, win->data->name, stride);
/* It's for head stride, each head size is 16 byte */
stride = ALIGN(stride, block_w) / block_w * 16;