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wifi: rtw89: phy: support PHY status IE-09 GEN2 for RTL8922D

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The format of PHY status IE-10 for RTL8922D is different from earlier
chips. Fortunately only starting bit is different, but the layout is the
same. Get the VHT/HE SIG-A value by corresponding mask accordingly.

The IE-09 format of generation 0 and 1 are totally the same.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260506131000.1706298-14-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih 2026-05-06 21:09:59 +08:00
parent 48402f736f
commit 0805ddc2fd
3 changed files with 82 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

72
drivers/net/wireless/realtek/rtw89/core.c
View File

@ -2156,7 +2156,19 @@ static void rtw89_core_parse_phy_status_ie09(struct rtw89_dev *rtwdev,
const struct rtw89_phy_sts_iehdr *iehdr,
struct rtw89_rx_phy_ppdu *phy_ppdu)
{
phy_ppdu->ie09 = (const void *)iehdr;
const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
const union rtw89_phy_sts_ie09 *ie09;
u16 ie_len;
ie09 = (const void *)iehdr;
if (phy->physt_gen >= 2) {
ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, (const void *)iehdr);
if (ie_len < sizeof(ie09->gen2))
return;
}
phy_ppdu->ie09 = ie09;
}
static void rtw89_core_parse_phy_status_ie10(struct rtw89_dev *rtwdev,
@ -3190,7 +3202,8 @@ static void rtw89_core_update_radiotap_vht(struct rtw89_dev *rtwdev,
struct ieee80211_rx_status *rx_status,
struct rtw89_rx_phy_ppdu *phy_ppdu)
{
const struct rtw89_phy_sts_ie09 *ie09;
const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
const union rtw89_phy_sts_ie09 *ie09;
struct ieee80211_radiotap_vht *vht;
u8 group_id;
u32 sig_a1;
@ -3208,7 +3221,10 @@ static void rtw89_core_update_radiotap_vht(struct rtw89_dev *rtwdev,
memset(vht, 0, sizeof(*vht));
rx_status->flag |= RX_FLAG_RADIOTAP_VHT;
sig_a1 = le64_get_bits(ie09->qw0, RTW89_PHY_STS_IE09_VHT_SIG_A1_MASK);
if (phy->physt_gen >= 2)
sig_a1 = le64_get_bits(ie09->gen2.qw0, RTW89_PHY_STS_IE09_VHT_SIG_A1_MASK_GEN2);
else
sig_a1 = le64_get_bits(ie09->gen0.qw0, RTW89_PHY_STS_IE09_VHT_SIG_A1_MASK);
group_id = u32_get_bits(sig_a1, RTW89_PHY_STS_IE09_VHT_SIG_A1_GRP_ID);
vht->group_id = group_id;
@ -3233,16 +3249,26 @@ static void rtw89_core_update_radiotap_he_su(struct rtw89_dev *rtwdev,
struct sk_buff *skb,
struct ieee80211_rx_status *rx_status,
struct ieee80211_radiotap_he *he,
const struct rtw89_phy_sts_ie09 *ie09)
const union rtw89_phy_sts_ie09 *ie09)
{
const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
u32 sig_a1, sig_a2;
u16 t;
if (!ie09)
return;
sig_a1 = le64_get_bits(ie09->qw0, RTW89_PHY_STS_IE09_HE_SU_SIG_A1_MASK);
sig_a2 = le64_get_bits(ie09->qw0, RTW89_PHY_STS_IE09_HE_SU_SIG_A2_MASK);
if (phy->physt_gen >= 2) {
sig_a1 = le64_get_bits(ie09->gen2.qw0,
RTW89_PHY_STS_IE09_HE_SU_SIG_A1_MASK_GEN2);
sig_a2 = le64_get_bits(ie09->gen2.qw0,
RTW89_PHY_STS_IE09_HE_SU_SIG_A2_MASK_GEN2_L0);
sig_a2 |= le64_get_bits(ie09->gen2.qw1,
RTW89_PHY_STS_IE09_HE_SU_SIG_A2_MASK_GEN2_H6) << 6;
} else {
sig_a1 = le64_get_bits(ie09->gen0.qw0, RTW89_PHY_STS_IE09_HE_SU_SIG_A1_MASK);
sig_a2 = le64_get_bits(ie09->gen0.qw0, RTW89_PHY_STS_IE09_HE_SU_SIG_A2_MASK);
}
he->data1 |= cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_BEAM_CHANGE_KNOWN |
IEEE80211_RADIOTAP_HE_DATA1_UL_DL_KNOWN |
@ -3295,16 +3321,26 @@ static void rtw89_core_update_radiotap_he_tb(struct rtw89_dev *rtwdev,
struct sk_buff *skb,
struct ieee80211_rx_status *rx_status,
struct ieee80211_radiotap_he *he,
const struct rtw89_phy_sts_ie09 *sig)
const union rtw89_phy_sts_ie09 *sig)
{
const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
u32 sig_a1, sig_a2;
u16 t;
if (!sig)
return;
sig_a1 = le64_get_bits(sig->qw0, RTW89_PHY_STS_IE09_HE_TB_SIG_A1_MASK);
sig_a2 = le64_get_bits(sig->qw0, RTW89_PHY_STS_IE09_HE_TB_SIG_A2_MASK);
if (phy->physt_gen >= 2) {
sig_a1 = le64_get_bits(sig->gen2.qw0,
RTW89_PHY_STS_IE09_HE_TB_SIG_A1_MASK_GEN2);
sig_a2 = le64_get_bits(sig->gen2.qw0,
RTW89_PHY_STS_IE09_HE_TB_SIG_A2_MASK_GEN2_L0);
sig_a2 |= le64_get_bits(sig->gen2.qw1,
RTW89_PHY_STS_IE09_HE_TB_SIG_A2_MASK_GEN2_H6);
} else {
sig_a1 = le64_get_bits(sig->gen0.qw0, RTW89_PHY_STS_IE09_HE_TB_SIG_A1_MASK);
sig_a2 = le64_get_bits(sig->gen0.qw0, RTW89_PHY_STS_IE09_HE_TB_SIG_A2_MASK);
}
he->data1 |= cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_BSS_COLOR_KNOWN |
IEEE80211_RADIOTAP_HE_DATA1_SPTL_REUSE_KNOWN |
@ -3445,9 +3481,10 @@ static void rtw89_core_update_radiotap_he_mu(struct rtw89_dev *rtwdev,
struct ieee80211_rx_status *rx_status,
struct ieee80211_radiotap_he *he,
struct ieee80211_radiotap_he_mu *he_mu,
const struct rtw89_phy_sts_ie09 *ie09,
const union rtw89_phy_sts_ie09 *ie09,
const struct rtw89_phy_sts_ie10 *ie10)
{
const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def;
const u8 *c1 = NULL, *c2 = NULL;
int n_center_26tone, n_ru, i;
bool doppler, comp;
@ -3468,8 +3505,17 @@ static void rtw89_core_update_radiotap_he_mu(struct rtw89_dev *rtwdev,
IEEE80211_RADIOTAP_HE_DATA2_PRE_FEC_PAD_KNOWN |
IEEE80211_RADIOTAP_HE_DATA2_PE_DISAMBIG_KNOWN);
sig_a1 = le64_get_bits(ie09->qw0, RTW89_PHY_STS_IE09_HE_MU_SIG_A1_MASK);
sig_a2 = le64_get_bits(ie09->qw0, RTW89_PHY_STS_IE09_HE_MU_SIG_A2_MASK);
if (phy->physt_gen >= 2) {
sig_a1 = le64_get_bits(ie09->gen2.qw0,
RTW89_PHY_STS_IE09_HE_MU_SIG_A1_MASK_GEN2);
sig_a2 = le64_get_bits(ie09->gen2.qw0,
RTW89_PHY_STS_IE09_HE_MU_SIG_A2_MASK_GEN2_L0);
sig_a2 |= le64_get_bits(ie09->gen2.qw1,
RTW89_PHY_STS_IE09_HE_MU_SIG_A2_MASK_GEN2_H6) << 6;
} else {
sig_a1 = le64_get_bits(ie09->gen0.qw0, RTW89_PHY_STS_IE09_HE_MU_SIG_A1_MASK);
sig_a2 = le64_get_bits(ie09->gen0.qw0, RTW89_PHY_STS_IE09_HE_MU_SIG_A2_MASK);
}
t = u32_get_bits(sig_a1, RTW89_PHY_STS_IE09_HE_MU_SIG_A1_ULDL);
he->data3 |= le16_encode_bits(t, IEEE80211_RADIOTAP_HE_DATA3_UL_DL);
@ -3593,7 +3639,7 @@ static void rtw89_core_update_radiotap_he(struct rtw89_dev *rtwdev,
.data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN),
};
struct ieee80211_radiotap_he_mu *he_mu = NULL;
const struct rtw89_phy_sts_ie09 *ie09;
const union rtw89_phy_sts_ie09 *ie09;
const struct rtw89_phy_sts_ie10 *ie10;
struct ieee80211_radiotap_he *he;
u16 he_format;

4
drivers/net/wireless/realtek/rtw89/core.h
View File

@ -24,7 +24,7 @@ struct rtw89_h2c_rf_tssi;
struct rtw89_fw_txpwr_track_cfg;
struct rtw89_phy_rfk_log_fmt;
struct rtw89_phy_calc_efuse_gain;
struct rtw89_phy_sts_ie09;
union rtw89_phy_sts_ie09;
struct rtw89_phy_sts_ie10;
struct rtw89_debugfs;
struct rtw89_regd_data;
@ -867,7 +867,7 @@ struct rtw89_rx_phy_ppdu {
bool to_self;
bool valid;
bool hdr_2_en;
const struct rtw89_phy_sts_ie09 *ie09; /* SIG-A */
const union rtw89_phy_sts_ie09 *ie09; /* SIG-A */
const struct rtw89_phy_sts_ie10 *ie10; /* SIG-B */
};

23
drivers/net/wireless/realtek/rtw89/txrx.h
View File

@ -658,15 +658,23 @@ struct rtw89_phy_sts_ie01_v2 {
#define RTW89_PHY_STS_IE01_V2_W9_RPL_FD_C GENMASK(11, 4)
#define RTW89_PHY_STS_IE01_V2_W9_RPL_FD_D GENMASK(23, 16)
struct rtw89_phy_sts_ie09 {
__le64 qw0;
union rtw89_phy_sts_ie09 {
struct {
__le64 qw0;
} gen0;
struct {
__le64 qw0;
__le64 qw1;
} gen2;
} __packed;
#define RTW89_PHY_STS_IE09_L_SIG_MASK GENMASK(21, 5) /* Legacy/VHT/HE L-SIG */
#define RTW89_PHY_STS_IE09_L_SIG_MASK_GEN2 GENMASK(31, 15) /* Legacy/VHT/HE L-SIG for GEN2 */
#define RTW89_PHY_STS_IE09_L_SIG_RATE GENMASK(3, 0)
#define RTW89_PHY_STS_IE09_L_SIG_RSVD BIT(4)
#define RTW89_PHY_STS_IE09_L_SIG_LENGTH GENMASK(16, 5)
#define RTW89_PHY_STS_IE09_VHT_SIG_A1_MASK GENMASK_ULL(45, 22) /* VHT SIG-A1 */
#define RTW89_PHY_STS_IE09_VHT_SIG_A1_MASK_GEN2 GENMASK_ULL(55, 32) /* VHT SIG-A1 for GEN2 */
#define RTW89_PHY_STS_IE09_VHT_SIG_A1_BW GENMASK(1, 0)
#define RTW89_PHY_STS_IE09_VHT_SIG_A1_RSVD1 BIT(2)
#define RTW89_PHY_STS_IE09_VHT_SIG_A1_STBC BIT(3)
@ -680,6 +688,8 @@ struct rtw89_phy_sts_ie09 {
#define RTW89_PHY_STS_IE09_VHT_SIG_A1_TXOP_NOPS BIT(22)
#define RTW89_PHY_STS_IE09_VHT_SIG_A1_RSVD2 BIT(23)
#define RTW89_PHY_STS_IE09_VHT_SIG_A2_MASK GENMASK_ULL(55, 46) /* VHT SIG-A2 */
#define RTW89_PHY_STS_IE09_VHT_SIG_A2_MASK_GEN2_L0 GENMASK_ULL(63, 56) /* VHT SIG-A2 for GEN2 */
#define RTW89_PHY_STS_IE09_VHT_SIG_A2_MASK_GEN2_H8 GENMASK_ULL(1, 0) /* VHT SIG-A2 for GEN2 */
#define RTW89_PHY_STS_IE09_VHT_SIG_A2_SGI BIT(0)
#define RTW89_PHY_STS_IE09_VHT_SIG_A2_SGI_DISA BIT(1)
#define RTW89_PHY_STS_IE09_VHT_SIG_A2_SUMU_CODE0 BIT(2)
@ -688,6 +698,7 @@ struct rtw89_phy_sts_ie09 {
#define RTW89_PHY_STS_IE09_VHT_SIG_A2_BF BIT(8)
#define RTW89_PHY_STS_IE09_VHT_SIG_A2_RSVD3 BIT(9)
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A1_MASK GENMASK_ULL(47, 22) /* HE SU SIG-A1 */
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A1_MASK_GEN2 GENMASK_ULL(57, 32) /* HE SU SIG-A1 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A1_FORMAT BIT(0)
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A1_BEAM_CHANGE BIT(1)
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A1_ULDL BIT(2)
@ -700,6 +711,8 @@ struct rtw89_phy_sts_ie09 {
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A1_GILTF GENMASK(22, 21)
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A1_NSTS GENMASK(25, 23)
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A2_MASK GENMASK_ULL(63, 48) /* HE SU SIG-A2 */
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A2_MASK_GEN2_L0 GENMASK_ULL(63, 58) /* HE SU SIG-A2 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A2_MASK_GEN2_H6 GENMASK_ULL(9, 0) /* HE SU SIG-A2 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A2_TXOP GENMASK(6, 0)
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A2_CODING BIT(7)
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A2_LDPC_XSYMSEG BIT(8)
@ -710,6 +723,7 @@ struct rtw89_phy_sts_ie09 {
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A2_RSVD2 BIT(14)
#define RTW89_PHY_STS_IE09_HE_SU_SIG_A2_DOPPLER BIT(15)
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A1_MASK GENMASK_ULL(47, 22) /* HE TB SIG-A1 */
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A1_MASK_GEN2 GENMASK_ULL(57, 32) /* HE TB SIG-A1 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A1_FORMAT BIT(0)
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A1_BSS_COLOR GENMASK(6, 1)
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A1_SB1 GENMASK(10, 7)
@ -719,9 +733,12 @@ struct rtw89_phy_sts_ie09 {
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A1_RSVD1 BIT(23)
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A1_BW GENMASK(25, 24)
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A2_MASK GENMASK_ULL(63, 48) /* HE TB SIG-A2 */
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A2_MASK_GEN2_L0 GENMASK_ULL(63, 58) /* HE TB SIG-A2 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A2_MASK_GEN2_H6 GENMASK_ULL(9, 0) /* HE TB SIG-A2 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A2_TXOP GENMASK(6, 0)
#define RTW89_PHY_STS_IE09_HE_TB_SIG_A2_RSVD1 GENMASK(15, 7)
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A1_MASK GENMASK_ULL(47, 22) /* HE MU SIG-A1 */
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A1_MASK_GEN2 GENMASK_ULL(57, 32) /* HE MU SIG-A1 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A1_ULDL BIT(0)
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A1_SIGB_MCS GENMASK(3, 1)
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A1_SIGB_DCM BIT(4)
@ -733,6 +750,8 @@ struct rtw89_phy_sts_ie09 {
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A1_GI_LTF GENMASK(24, 23)
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A1_DOPPLER BIT(25)
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A2_MASK GENMASK_ULL(63, 48) /* HE MU SIG-A2 */
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A2_MASK_GEN2_L0 GENMASK_ULL(63, 58) /* HE MU SIG-A2 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A2_MASK_GEN2_H6 GENMASK_ULL(9, 0) /* HE MU SIG-A2 for GEN2 */
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A2_TXOP GENMASK(6, 0)
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A2_RSVD BIT(7)
#define RTW89_PHY_STS_IE09_HE_MU_SIG_A2_LTF_MID GENMASK(10, 8)