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KVM: arm64: GICv2: Always trap GICV_DIR register
Since we can't decide to trap the DIR register on a per-vcpu basis, always trap the second page of the GIC CPU interface. Yes, this is costly. On the bright side, no sane SW should use EOImode==1 on GICv2... Tested-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Mark Brown <broonie@kernel.org> Link: https://msgid.link/20251120172540.2267180-40-maz@kernel.org Signed-off-by: Oliver Upton <oupton@kernel.org>
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@ -63,6 +63,10 @@ int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu)
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return -1;
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}
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/* Handle deactivation as a normal exit */
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if ((fault_ipa - vgic->vgic_cpu_base) >= GIC_CPU_DEACTIVATE)
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return 0;
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rd = kvm_vcpu_dabt_get_rd(vcpu);
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addr = kvm_vgic_global_state.vcpu_hyp_va;
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addr += fault_ipa - vgic->vgic_cpu_base;
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@ -457,7 +457,7 @@ int vgic_v2_map_resources(struct kvm *kvm)
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if (!static_branch_unlikely(&vgic_v2_cpuif_trap)) {
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ret = kvm_phys_addr_ioremap(kvm, dist->vgic_cpu_base,
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kvm_vgic_global_state.vcpu_base,
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KVM_VGIC_V2_CPU_SIZE, true);
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KVM_VGIC_V2_CPU_SIZE - SZ_4K, true);
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if (ret) {
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kvm_err("Unable to remap VGIC CPU to VCPU\n");
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return ret;
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