wifi: rtw89: add CFO XTAL registers field to support 8851B

Since CFO XTAL registers of 8851B is different from 8852A, add a chip_info
field to define their difference. Other chips use another interface, so
fill NULL to this field.

Signed-off-by: Chia-Yuan Li <leo.li@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230421024551.29994-5-pkshih@realtek.com
This commit is contained in:
Chia-Yuan Li 2023-04-21 10:45:47 +08:00 committed by Kalle Valo
parent a24be8bbcb
commit 0789881aa3
7 changed files with 38 additions and 7 deletions

View File

@ -3101,6 +3101,12 @@ struct rtw89_imr_info {
u32 tmac_imr_set;
};
struct rtw89_xtal_info {
u32 xcap_reg;
u32 sc_xo_mask;
u32 sc_xi_mask;
};
struct rtw89_rrsr_cfgs {
struct rtw89_reg3_def ref_rate;
struct rtw89_reg3_def rsc;
@ -3246,6 +3252,7 @@ struct rtw89_chip_info {
u32 dma_ch_mask;
u32 edcca_lvl_reg;
const struct wiphy_wowlan_support *wowlan_stub;
const struct rtw89_xtal_info *xtal_info;
};
union rtw89_bus_info {

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@ -2343,27 +2343,29 @@ void rtw89_phy_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb,
static u8 rtw89_phy_cfo_get_xcap_reg(struct rtw89_dev *rtwdev, bool sc_xo)
{
const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info;
u32 reg_mask;
if (sc_xo)
reg_mask = B_AX_XTAL_SC_XO_MASK;
reg_mask = xtal->sc_xo_mask;
else
reg_mask = B_AX_XTAL_SC_XI_MASK;
reg_mask = xtal->sc_xi_mask;
return (u8)rtw89_read32_mask(rtwdev, R_AX_XTAL_ON_CTRL0, reg_mask);
return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask);
}
static void rtw89_phy_cfo_set_xcap_reg(struct rtw89_dev *rtwdev, bool sc_xo,
u8 val)
{
const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info;
u32 reg_mask;
if (sc_xo)
reg_mask = B_AX_XTAL_SC_XO_MASK;
reg_mask = xtal->sc_xo_mask;
else
reg_mask = B_AX_XTAL_SC_XI_MASK;
reg_mask = xtal->sc_xi_mask;
rtw89_write32_mask(rtwdev, R_AX_XTAL_ON_CTRL0, reg_mask, val);
rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val);
}
static void rtw89_phy_cfo_set_crystal_cap(struct rtw89_dev *rtwdev,
@ -2376,7 +2378,7 @@ static void rtw89_phy_cfo_set_crystal_cap(struct rtw89_dev *rtwdev,
if (!force && cfo->crystal_cap == crystal_cap)
return;
crystal_cap = clamp_t(u8, crystal_cap, 0, 127);
if (chip->chip_id == RTL8852A) {
if (chip->chip_id == RTL8852A || chip->chip_id == RTL8851B) {
rtw89_phy_cfo_set_xcap_reg(rtwdev, true, crystal_cap);
rtw89_phy_cfo_set_xcap_reg(rtwdev, false, crystal_cap);
sc_xo_val = rtw89_phy_cfo_get_xcap_reg(rtwdev, true);

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@ -243,6 +243,12 @@
#define B_AX_XTAL_SC_XI_MASK GENMASK(16, 10)
#define B_AX_XTAL_SC_MASK GENMASK(6, 0)
#define R_AX_XTAL_ON_CTRL3 0x028C
#define B_AX_XTAL_SC_INIT_A_BLOCK_MASK GENMASK(30, 24)
#define B_AX_XTAL_SC_LPS_A_BLOCK_MASK GENMASK(22, 16)
#define B_AX_XTAL_SC_XO_A_BLOCK_MASK GENMASK(14, 8)
#define B_AX_XTAL_SC_XI_A_BLOCK_MASK GENMASK(6, 0)
#define R_AX_GPIO0_7_FUNC_SEL 0x02D0
#define R_AX_EECS_EESK_FUNC_SEL 0x02D8

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@ -18,6 +18,12 @@
#define RTW8851B_MODULE_FIRMWARE \
RTW8851B_FW_BASENAME ".bin"
static const struct rtw89_xtal_info rtw8851b_xtal_info = {
.xcap_reg = R_AX_XTAL_ON_CTRL3,
.sc_xo_mask = B_AX_XTAL_SC_XO_A_BLOCK_MASK,
.sc_xi_mask = B_AX_XTAL_SC_XI_A_BLOCK_MASK,
};
static const struct rtw89_chip_ops rtw8851b_chip_ops = {
.fem_setup = NULL,
.fill_txdesc = rtw89_core_fill_txdesc,
@ -94,6 +100,7 @@ const struct rtw89_chip_info rtw8851b_chip_info = {
BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) |
BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI),
.edcca_lvl_reg = R_SEG0R_EDCCA_LVL_V1,
.xtal_info = &rtw8851b_xtal_info,
};
EXPORT_SYMBOL(rtw8851b_chip_info);

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@ -463,6 +463,12 @@ static const struct rtw89_imr_info rtw8852a_imr_info = {
.tmac_imr_set = B_AX_TMAC_IMR_SET,
};
static const struct rtw89_xtal_info rtw8852a_xtal_info = {
.xcap_reg = R_AX_XTAL_ON_CTRL0,
.sc_xo_mask = B_AX_XTAL_SC_XO_MASK,
.sc_xi_mask = B_AX_XTAL_SC_XI_MASK,
};
static const struct rtw89_rrsr_cfgs rtw8852a_rrsr_cfgs = {
.ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
.rsc = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_RSC_MASK, 2},
@ -2160,6 +2166,7 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
#ifdef CONFIG_PM
.wowlan_stub = &rtw_wowlan_stub_8852a,
#endif
.xtal_info = &rtw8852a_xtal_info,
};
EXPORT_SYMBOL(rtw8852a_chip_info);

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@ -2599,6 +2599,7 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
#ifdef CONFIG_PM
.wowlan_stub = &rtw_wowlan_stub_8852b,
#endif
.xtal_info = NULL,
};
EXPORT_SYMBOL(rtw8852b_chip_info);

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@ -2898,6 +2898,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
#ifdef CONFIG_PM
.wowlan_stub = &rtw_wowlan_stub_8852c,
#endif
.xtal_info = NULL,
};
EXPORT_SYMBOL(rtw8852c_chip_info);