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wifi: iwlwifi: cfg: unify Qu/QuZ configs
Now that the fw_name_mac is no longer around and derived from the MAC type automatically, we no longer need to have different configurations for Qu/QuZ. Combine them. For the killer AX1650s/i, also fix the names, there was a mixup. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com> Link: https://patch.msgid.link/20250502151751.957fbb5437ce.If51ad0b2c8afaaa131208125af3bc292793613bb@changeid
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@ -245,54 +245,6 @@ const struct iwl_cfg iwl_ax201_cfg_qu_hr = {
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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};
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const struct iwl_cfg iwl_quz_hr1 = {
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IWL_DEVICE_22500,
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/*
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* This device doesn't support receiving BlockAck with a large bitmap
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* so we need to restrict the size of transmitted aggregation to the
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* HT size; mac80211 would otherwise pick the HE max (256) by default.
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*/
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.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
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.tx_with_siso_diversity = true,
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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};
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const struct iwl_cfg iwl_ax201_cfg_quz_hr = {
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.name = "Intel(R) Wi-Fi 6 AX201 160MHz",
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IWL_DEVICE_22500,
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/*
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* This device doesn't support receiving BlockAck with a large bitmap
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* so we need to restrict the size of transmitted aggregation to the
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* HT size; mac80211 would otherwise pick the HE max (256) by default.
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*/
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.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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};
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const struct iwl_cfg iwl_ax1650s_cfg_quz_hr = {
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.name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201D2W)",
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IWL_DEVICE_22500,
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/*
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* This device doesn't support receiving BlockAck with a large bitmap
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* so we need to restrict the size of transmitted aggregation to the
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* HT size; mac80211 would otherwise pick the HE max (256) by default.
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*/
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.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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};
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const struct iwl_cfg iwl_ax1650i_cfg_quz_hr = {
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.name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201NGW)",
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IWL_DEVICE_22500,
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/*
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* This device doesn't support receiving BlockAck with a large bitmap
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* so we need to restrict the size of transmitted aggregation to the
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* HT size; mac80211 would otherwise pick the HE max (256) by default.
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*/
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.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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};
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const struct iwl_cfg iwl_ax200_cfg_cc = {
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.fw_name_pre = IWL_CC_A_FW_PRE,
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IWL_DEVICE_22500,
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@ -306,7 +258,7 @@ const struct iwl_cfg iwl_ax200_cfg_cc = {
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};
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const struct iwl_cfg killer1650s_2ax_cfg_qu_hr = {
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.name = "Killer(R) Wi-Fi 6 AX1650s 160MHz Wireless Network Adapter (201NGW)",
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.name = iwl_ax201_killer_1650s_name,
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IWL_DEVICE_22500,
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/*
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* This device doesn't support receiving BlockAck with a large bitmap
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@ -318,18 +270,7 @@ const struct iwl_cfg killer1650s_2ax_cfg_qu_hr = {
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};
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const struct iwl_cfg killer1650i_2ax_cfg_qu_hr = {
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.name = "Killer(R) Wi-Fi 6 AX1650i 160MHz Wireless Network Adapter (201D2W)",
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IWL_DEVICE_22500,
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/*
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* This device doesn't support receiving BlockAck with a large bitmap
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* so we need to restrict the size of transmitted aggregation to the
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* HT size; mac80211 would otherwise pick the HE max (256) by default.
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*/
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.max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT,
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.num_rbds = IWL_NUM_RBDS_22000_HE,
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};
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const struct iwl_cfg iwl_cfg_quz_hr = {
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.name = iwl_ax201_killer_1650i_name,
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IWL_DEVICE_22500,
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/*
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* This device doesn't support receiving BlockAck with a large bitmap
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@ -623,13 +623,9 @@ extern const struct iwl_cfg iwl9560_qu_jf_cfg;
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extern const struct iwl_cfg iwl9560_quz_a0_jf_b0_cfg;
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extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
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extern const struct iwl_cfg iwl_qu_hr1;
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extern const struct iwl_cfg iwl_quz_hr1;
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extern const struct iwl_cfg iwl_qu_hr;
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extern const struct iwl_cfg iwl_ax200_cfg_cc;
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extern const struct iwl_cfg iwl_ax201_cfg_qu_hr;
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extern const struct iwl_cfg iwl_ax201_cfg_quz_hr;
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extern const struct iwl_cfg iwl_ax1650i_cfg_quz_hr;
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extern const struct iwl_cfg iwl_ax1650s_cfg_quz_hr;
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extern const struct iwl_cfg killer1650s_2ax_cfg_qu_hr;
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extern const struct iwl_cfg killer1650i_2ax_cfg_qu_hr;
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extern const struct iwl_cfg killer1650x_2ax_cfg;
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@ -644,7 +640,6 @@ extern const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0_long;
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extern const struct iwl_cfg iwl_cfg_ma;
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extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0;
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extern const struct iwl_cfg iwl_cfg_quz_hr;
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#endif /* CONFIG_IWLMVM */
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#if IS_ENABLED(CONFIG_IWLMLD)
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@ -201,6 +201,8 @@ const char *iwl_drv_get_fwname_pre(struct iwl_trans *trans, char *buf)
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break;
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case IWL_CFG_MAC_TYPE_QUZ:
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mac = "QuZ";
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/* all QuZ use A0 firmware */
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mac_step = 'a';
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break;
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case IWL_CFG_MAC_TYPE_SO:
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case IWL_CFG_MAC_TYPE_SOF:
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@ -685,43 +685,43 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
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DEVICE(0xA0F0), SUBDEV(0x4070), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0xA0F0), SUBDEV(0x6074), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x0070), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x0074), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x6074), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x0078), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x007C), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x0310), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax1650s_cfg_quz_hr, NULL,
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IWL_DEV_INFO(killer1650s_2ax_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x1651), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax1650i_cfg_quz_hr, NULL,
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IWL_DEV_INFO(killer1650i_2ax_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x1652), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x2074), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x02F0), SUBDEV(0x4070), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x0070), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x0074), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x0078), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x007C), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x0310), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax1650s_cfg_quz_hr, NULL,
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IWL_DEV_INFO(killer1650s_2ax_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x1651), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax1650i_cfg_quz_hr, NULL,
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IWL_DEV_INFO(killer1650i_2ax_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x1652), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x2074), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL,
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x06F0), SUBDEV(0x4070), BW_NO_LIMIT),
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IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL,
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DEVICE(0x34F0), SUBDEV(0x0070), BW_NO_LIMIT),
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@ -1025,11 +1025,11 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = {
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RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB),
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/* QuZ */
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IWL_DEV_INFO(iwl_quz_hr1, iwl_ax101_name, MAC_TYPE(QUZ),
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IWL_DEV_INFO(iwl_qu_hr1, iwl_ax101_name, MAC_TYPE(QUZ),
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RF_TYPE(HR1), NO_CDB),
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IWL_DEV_INFO(iwl_cfg_quz_hr, iwl_ax203_name, MAC_TYPE(QUZ),
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IWL_DEV_INFO(iwl_qu_hr, iwl_ax203_name, MAC_TYPE(QUZ),
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MAC_STEP(B), RF_TYPE(HR2), BW_LIMIT(80), NO_CDB),
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IWL_DEV_INFO(iwl_cfg_quz_hr, iwl_ax201_name, MAC_TYPE(QUZ),
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IWL_DEV_INFO(iwl_qu_hr, iwl_ax201_name, MAC_TYPE(QUZ),
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MAC_STEP(B), RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB),
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/* Ma */
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@ -1520,22 +1520,6 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (cfg_7265d &&
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(iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D)
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iwl_trans->cfg = cfg_7265d;
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/*
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* This is a hack to switch from QuZ to Qu C0. We need to
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* do this for all cfgs that use QuZ, except for those using
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* Jf, which have already been moved to the new table. The
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* rest must be removed once we convert Qu with Hr as well.
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*/
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if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QUZ) {
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if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
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iwl_trans->cfg = &iwl_ax201_cfg_quz_hr;
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else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_hr)
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iwl_trans->cfg = &iwl_ax1650s_cfg_quz_hr;
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else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_hr)
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iwl_trans->cfg = &iwl_ax1650i_cfg_quz_hr;
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}
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#endif
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/*
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* If we didn't set the cfg yet, the PCI ID table entry should have
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