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mvebu dt64 for 5.17 (part 1)

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Enable more network hardware and gpios on CN9130-CRB
 Add new clock node needed by comphy on armada-37xx
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Merge tag 'mvebu-dt64-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt64 for 5.17 (part 1)

Enable more network hardware and gpios on CN9130-CRB
Add new clock node needed by comphy on armada-37xx

* tag 'mvebu-dt64-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: dts: marvell: cn9130: enable CP0 GPIO controllers
  arm64: dts: marvell: cn9130: add GPIO and SPI aliases
  arm64: dts: marvell: armada-37xx: Add xtal clock to comphy node
  arm/arm64: dts: Add MV88E6393X to CN9130-CRB device tree
  arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB

Link: https://lore.kernel.org/r/878rwjm8vj.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-12-20 15:58:27 +01:00
commit 0724f8a147
3 changed files with 157 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/marvell/armada-37xx.dtsi
View File

@ -265,6 +265,8 @@ comphy: phy@18300 {
"lane2_sata_usb3";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&xtalclk>;
clock-names = "xtal";
comphy0: phy@0 {
reg = <0>;

140
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
View File

@ -17,6 +17,8 @@ aliases {
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
ethernet2 = &cp0_eth2;
gpio1 = &cp0_gpio1;
gpio2 = &cp0_gpio2;
};
memory@0 {
@ -71,6 +73,17 @@ cp0_reg_sd_vcc: cp0_sd_vcc@0 {
enable-active-high;
regulator-always-on;
};
sfp: sfp {
compatible = "sff,sfp";
i2c-bus = <&cp0_i2c1>;
mod-def0-gpios = <&expander0 3 GPIO_ACTIVE_LOW>;
los-gpio = <&expander0 15 GPIO_ACTIVE_HIGH>;
tx-disable-gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&cp0_gpio1 24 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <3000>;
status = "okay";
};
};
&uart0 {
@ -114,6 +127,14 @@ cp0_spi0_pins: cp0-spi-pins-0 {
};
};
&cp0_gpio1 {
status = "okay";
};
&cp0_gpio2 {
status = "okay";
};
&cp0_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&cp0_i2c0_pins>;
@ -185,6 +206,125 @@ &cp0_mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
switch6: switch0@6 {
/* Actual device is MV88E6393X */
compatible = "marvell,mv88e6190";
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
interrupt-parent = <&cp0_gpio1>;
interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "p1";
phy-handle = <&switch0phy1>;
};
port@2 {
reg = <2>;
label = "p2";
phy-handle = <&switch0phy2>;
};
port@3 {
reg = <3>;
label = "p3";
phy-handle = <&switch0phy3>;
};
port@4 {
reg = <4>;
label = "p4";
phy-handle = <&switch0phy4>;
};
port@5 {
reg = <5>;
label = "p5";
phy-handle = <&switch0phy5>;
};
port@6 {
reg = <6>;
label = "p6";
phy-handle = <&switch0phy6>;
};
port@7 {
reg = <7>;
label = "p7";
phy-handle = <&switch0phy7>;
};
port@8 {
reg = <8>;
label = "p8";
phy-handle = <&switch0phy8>;
};
port@9 {
reg = <9>;
label = "p9";
phy-mode = "10gbase-r";
sfp = <&sfp>;
managed = "in-band-status";
};
port@a {
reg = <10>;
label = "cpu";
ethernet = <&cp0_eth0>;
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch0phy1: switch0phy1@1 {
reg = <0x1>;
};
switch0phy2: switch0phy2@2 {
reg = <0x2>;
};
switch0phy3: switch0phy3@3 {
reg = <0x3>;
};
switch0phy4: switch0phy4@4 {
reg = <0x4>;
};
switch0phy5: switch0phy5@5 {
reg = <0x5>;
};
switch0phy6: switch0phy6@6 {
reg = <0x6>;
};
switch0phy7: switch0phy7@7 {
reg = <0x7>;
};
switch0phy8: switch0phy8@8 {
reg = <0x8>;
};
};
};
};
&cp0_xmdio {

15
arch/arm64/boot/dts/marvell/cn9130.dtsi
View File

@ -11,6 +11,13 @@ / {
model = "Marvell Armada CN9130 SoC";
compatible = "marvell,cn9130", "marvell,armada-ap807-quad",
"marvell,armada-ap807";
aliases {
gpio1 = &cp0_gpio1;
gpio2 = &cp0_gpio2;
spi1 = &cp0_spi0;
spi2 = &cp0_spi1;
};
};
/*
@ -35,3 +42,11 @@ / {
#undef CP11X_PCIE0_BASE
#undef CP11X_PCIE1_BASE
#undef CP11X_PCIE2_BASE
&cp0_gpio1 {
status = "okay";
};
&cp0_gpio2 {
status = "okay";
};