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spi: cadence-qspi: Support per spi-mem operation frequency switches
Every ->exec_op() call correctly configures the spi bus speed to the maximum allowed frequency for the memory using the constant spi default parameter. Since we can now have per-operation constraints, let's use the value that comes from the spi-mem operation structure instead. In case there is no specific limitation for this operation, the default spi device value will be given anyway. The per-operation frequency capability is thus advertised to the spi-mem core. Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-6-ad218dbc406f@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1409,7 +1409,7 @@ static int cqspi_mem_process(struct spi_mem *mem, const struct spi_mem_op *op)
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struct cqspi_flash_pdata *f_pdata;
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f_pdata = &cqspi->f_pdata[spi_get_chipselect(mem->spi, 0)];
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cqspi_configure(f_pdata, mem->spi->max_speed_hz);
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cqspi_configure(f_pdata, op->max_freq);
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if (op->data.dir == SPI_MEM_DATA_IN && op->data.buf.in) {
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/*
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@ -1658,6 +1658,7 @@ static const struct spi_controller_mem_ops cqspi_mem_ops = {
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static const struct spi_controller_mem_caps cqspi_mem_caps = {
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.dtr = true,
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.per_op_freq = true,
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};
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static int cqspi_setup_flash(struct cqspi_st *cqspi)
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