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drm/amd/display: Promote DC to 3.2.379

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This version brings along the following updates:

 - Add allow_clock_gating to dcn42 dccg.
 - Bypass post csc for additional color spaces in dcn42.
 - Remove unused dml2_project.
 - Unset Replay desync error verification by default.
 - Align HWSS fast commit path with legacy path.
 - Fix implicit narrowing conversion warnings.
 - Fix double free.
 - Introduce power module on Linux.
 - Add power module on Linux.
 - Fix fpu guard warning.
 - Add Replay/PSR active check in link loss status check.
 - Remove SYMCLK F and G values from link encoder and MANUAL_FLOW_CONTROL from optc.
 - Add minimum vfp requirement.
 - Fix narrowing boundaries and eDP parser assignment.
 - Fix dml2_0 narrowing boundaries.
 - Add README.md file to DML2_0 repository.
 - Fix DPMS using partially updated pipe context.
 - Move dml2_destroy to non-FPU compilation unit.

Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Acked-by: Tom Chung <ChiaHsuan.Chung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Taimur Hassan 2026-04-10 18:09:25 -05:00 committed by Alex Deucher
parent 6fd45b5d89
commit 06e7f7aa7a
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/dc.h
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@ -63,7 +63,7 @@ struct dcn_dsc_reg_state;
struct dcn_optc_reg_state;
struct dcn_dccg_reg_state;
#define DC_VER "3.2.378"
#define DC_VER "3.2.379"
/**
* MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC