arm64: dts: imx8: create unified pcie0 and pcie0_ep label for all chips

Add unified pcie<n> and pcie<n>_ep label for existed chipes to prepare
applied one overay file to enable EP function.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frank Li 2025-04-23 20:41:23 -04:00 committed by Shawn Guo
parent e2cfc140ae
commit 06d9879c10
4 changed files with 24 additions and 15 deletions

View File

@ -37,15 +37,18 @@ hsio_phy: phy@5f1a0000 {
power-domains = <&pd IMX_SC_R_SERDES_1>;
status = "disabled";
};
};
&pcieb {
#interrupt-cells = <1>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
interrupt-map = <0 0 0 1 &gic 0 47 4>,
<0 0 0 2 &gic 0 48 4>,
<0 0 0 3 &gic 0 49 4>,
<0 0 0 4 &gic 0 50 4>;
interrupt-map-mask = <0 0 0 0x7>;
pcie0: pcie@5f010000 {
#interrupt-cells = <1>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
interrupt-map = <0 0 0 1 &gic 0 47 4>,
<0 0 0 2 &gic 0 48 4>,
<0 0 0 3 &gic 0 49 4>,
<0 0 0 4 &gic 0 50 4>;
interrupt-map-mask = <0 0 0 0x7>;
};
pcie0_ep: pcie-ep@5f010000 {
};
};

View File

@ -2153,7 +2153,7 @@ hdmi_tx_phy: phy@32fdff00 {
};
};
pcie: pcie@33800000 {
pcie0: pcie: pcie@33800000 {
compatible = "fsl,imx8mp-pcie";
reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>;
reg-names = "dbi", "config";
@ -2191,7 +2191,7 @@ pcie: pcie@33800000 {
status = "disabled";
};
pcie_ep: pcie-ep@33800000 {
pcie0_ep: pcie_ep: pcie-ep@33800000 {
compatible = "fsl,imx8mp-pcie-ep";
reg = <0x33800000 0x100000>,
<0x18000000 0x8000000>,

View File

@ -12,7 +12,7 @@ &hsio_subsys {
#address-cells = <1>;
#size-cells = <1>;
pciea: pcie@5f000000 {
pcie0: pciea: pcie@5f000000 {
compatible = "fsl,imx8q-pcie";
reg = <0x5f000000 0x10000>,
<0x4ff00000 0x80000>;
@ -42,7 +42,7 @@ pciea: pcie@5f000000 {
status = "disabled";
};
pciea_ep: pcie-ep@5f000000 {
pcie0_ep: pciea_ep: pcie-ep@5f000000 {
compatible = "fsl,imx8q-pcie-ep";
reg = <0x5f000000 0x00010000>,
<0x40000000 0x10000000>;
@ -61,7 +61,7 @@ pciea_ep: pcie-ep@5f000000 {
status = "disabled";
};
pcieb: pcie@5f010000 {
pcie1: pcieb: pcie@5f010000 {
compatible = "fsl,imx8q-pcie";
reg = <0x5f010000 0x10000>,
<0x8ff00000 0x80000>;

View File

@ -38,4 +38,10 @@ hsio_phy: phy@5f1a0000 {
power-domains = <&pd IMX_SC_R_SERDES_1>;
status = "disabled";
};
pcie0: pcie@5f010000 {
};
pcie0_ep: pcie-ep@5f010000 {
};
};