arm64: dts: qcom: kaanapali-mtp: Enable display DSI devices

Enable MDSS/DPU/DSI0 and add Novatek NT37801 panel on Kaanapali MTP
board.

NT37801 Spec V1.0 chapter "5.7.1 Power On Sequence" states VDDI ranges
1.65V~1.95V, but ldo12 ranges 1.2V~1.8V, so change ldo12 range to
1.65V~1.8V.

pmh0110_d_e0_gpios and pmh0110_f_e0_gpios are configured for
level shifters. Kaanapali need configure these pinctrl for panel
function.

Signed-off-by: Yuanjie Yang <yuanjie.yang@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260322-knp-pmic-dt-v1-6-70bc40ea4428@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Yuanjie Yang 2026-03-22 23:19:46 -07:00 committed by Bjorn Andersson
parent 855b7da59d
commit 06d6965d22

View File

@ -375,7 +375,7 @@ vreg_l11b_1p0: ldo11 {
vreg_l12b_1p8: ldo12 {
regulator-name = "vreg_l12b_1p8";
regulator-min-microvolt = <1200000>;
regulator-min-microvolt = <1650000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
regulator-allow-set-load;
@ -873,6 +873,51 @@ &lpass_vamacro {
qcom,dmic-sample-rate = <4800000>;
};
&mdss {
status = "okay";
};
&mdss_dsi0 {
vdda-supply = <&vreg_l1d_1p2>;
status = "okay";
panel@0 {
compatible = "novatek,nt37801";
reg = <0>;
pinctrl-0 = <&sde_dsi_active &sde_te_active &sde_esync0_suspend
&sde_mdp_vsync_p_1p2_active &sde_mdp_vsync_p_1p8_active
&sde_disp0_rst_1p2_active &sde_disp0_rst_1p8_active>;
pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend &sde_esync0_suspend
&sde_mdp_vsync_p_1p2_active &sde_mdp_vsync_p_1p8_active
&sde_disp0_rst_1p2_active &sde_disp0_rst_1p8_active>;
pinctrl-names = "default", "sleep";
vci-supply = <&vreg_l13b_3p0>;
vdd-supply = <&vreg_l11b_1p0>;
vddio-supply = <&vreg_l12b_1p8>;
reset-gpios = <&tlmm 98 GPIO_ACTIVE_LOW>;
port {
panel0_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
};
&mdss_dsi0_out {
remote-endpoint = <&panel0_in>;
data-lanes = <0 1 2 3>;
};
&mdss_dsi0_phy {
vdds-supply = <&vreg_l3d_0p8>;
status = "okay";
};
&pcie0 {
pinctrl-0 = <&pcie0_default_state>;
pinctrl-names = "default";
@ -970,6 +1015,42 @@ bt_default: bt-default-state {
};
};
&pmh0110_d_e0_gpios {
sde_mdp_vsync_p_1p2_active: sde-mdp-vsync-p-1p2-active-state {
pins = "gpio9";
function = "paired";
input-disable;
output-enable;
power-source = <2>; /* 1.2v */
};
sde_mdp_vsync_p_1p8_active: sde-mdp-vsync-p-1p8-active-state {
pins = "gpio10";
function = "paired";
input-enable;
output-disable;
power-source = <1>; /* 1.8v */
};
};
&pmh0110_f_e0_gpios {
sde_disp0_rst_1p2_active: sde-disp0-rst-1p2-active-state {
pins = "gpio9";
function = "paired";
input-enable;
output-disable;
power-source = <2>; /* 1.2v */
};
sde_disp0_rst_1p8_active: sde-disp0-rst-1p8-active-state {
pins = "gpio10";
function = "paired";
input-disable;
output-enable;
power-source = <1>; /* 1.8v */
};
};
&pon_resin {
linux,code = <KEY_VOLUMEDOWN>;
@ -1128,6 +1209,41 @@ spkr_1_sd_n_active: spkr-1-sd-n-active-state {
bias-disable;
};
sde_te_active: sde-te-active-state {
pins = "gpio86";
function = "mdp_vsync";
drive-strength = <2>;
bias-pull-down;
};
sde_te_suspend: sde-te-suspend-state {
pins = "gpio86";
function = "mdp_vsync";
drive-strength = <2>;
bias-pull-down;
};
sde_esync0_suspend: sde-esync0-suspend-state {
pins = "gpio88";
function = "mdp_esync0_out";
drive-strength = <2>;
bias-pull-down;
};
sde_dsi_active: sde-dsi-active-state {
pins = "gpio98";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
sde_dsi_suspend: sde-dsi-suspend-state {
pins = "gpio98";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
key_vol_up_default: key-vol-up-default-state {
pins = "gpio101";
function = "gpio";