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soc: rockchip: rk3588: add SYS_GRF SOC_CON6 register offset

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Add the RK3588_SYSGRF_SOC_CON6 register offset to the RK3588 GRF
header. This register contains the I2S MCLK output to IO gate bits,
needed by the clock driver.

Signed-off-by: Daniele Briguglio <hello@superkali.me>
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://patch.msgid.link/20260419-rk3588-mclk-gate-grf-v4-4-513a42dd1dcc@superkali.me
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Daniele Briguglio 2026-04-19 13:43:09 +02:00 committed by Heiko Stuebner
parent 254f49634e
commit 06c990bffd
1 changed files with 2 additions and 0 deletions
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2
include/soc/rockchip/rk3588_grf.h
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@ -19,4 +19,6 @@
/* Whether the LPDDR5 is in 2:1 (= 0) or 4:1 (= 1) CKR a.k.a. DQS mode */
#define RK3588_PMUGRF_OS_REG6_LP5_CKR BIT(0)
#define RK3588_SYSGRF_SOC_CON6 0x0318
#endif /* __SOC_RK3588_GRF_H */