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RDMA/mana_ib: Allocate interrupt contexts on EQs
Use the GIC functions to allocate interrupt contexts for RDMA EQs. These interrupt contexts may be shared with Ethernet EQs when MSI-X vectors are limited. The driver now supports allocating dedicated MSI-X for each EQ. Indicate this capability through driver capability bits. The RDMA EQs pass use_msi_bitmap=false to share MSI-X vectors with Ethernet, while the capability flag advertises that the driver supports per-vPort EQ separation when hardware has sufficient vectors. Populate eq.irq on all RDMA EQs for consistency with the Ethernet path. Also relocate the GDMA_DRV_CAP_FLAG_1_HW_VPORT_LINK_AWARE define to its numeric BIT(6) position among the other capability flags. Signed-off-by: Long Li <longli@microsoft.com> Acked-by: Leon Romanovsky <leon@kernel.org> Link: https://patch.msgid.link/20260605005717.2059954-7-longli@microsoft.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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062b2b051f
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@ -765,7 +765,8 @@ int mana_ib_create_eqs(struct mana_ib_dev *mdev)
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{
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struct gdma_context *gc = mdev_to_gc(mdev);
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struct gdma_queue_spec spec = {};
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int err, i;
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struct gdma_irq_context *gic;
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int err, i, msi;
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spec.type = GDMA_EQ;
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spec.monitor_avl_buf = false;
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@ -773,11 +774,19 @@ int mana_ib_create_eqs(struct mana_ib_dev *mdev)
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spec.eq.callback = mana_ib_event_handler;
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spec.eq.context = mdev;
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spec.eq.log2_throttle_limit = LOG2_EQ_THROTTLE;
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spec.eq.msix_index = 0;
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msi = 0;
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gic = mana_gd_get_gic(gc, false, &msi);
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if (IS_ERR(gic))
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return PTR_ERR(gic);
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spec.eq.msix_index = msi;
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err = mana_gd_create_mana_eq(mdev->gdma_dev, &spec, &mdev->fatal_err_eq);
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if (err)
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if (err) {
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mana_gd_put_gic(gc, false, 0);
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return err;
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}
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mdev->fatal_err_eq->eq.irq = gic->irq;
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mdev->eqs = kzalloc_objs(struct gdma_queue *,
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mdev->ib_dev.num_comp_vectors);
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@ -787,32 +796,50 @@ int mana_ib_create_eqs(struct mana_ib_dev *mdev)
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}
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spec.eq.callback = NULL;
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for (i = 0; i < mdev->ib_dev.num_comp_vectors; i++) {
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spec.eq.msix_index = (i + 1) % gc->num_msix_usable;
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err = mana_gd_create_mana_eq(mdev->gdma_dev, &spec, &mdev->eqs[i]);
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if (err)
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msi = (i + 1) % gc->num_msix_usable;
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gic = mana_gd_get_gic(gc, false, &msi);
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if (IS_ERR(gic)) {
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err = PTR_ERR(gic);
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goto destroy_eqs;
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}
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spec.eq.msix_index = msi;
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err = mana_gd_create_mana_eq(mdev->gdma_dev, &spec, &mdev->eqs[i]);
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if (err) {
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mana_gd_put_gic(gc, false, msi);
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goto destroy_eqs;
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}
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mdev->eqs[i]->eq.irq = gic->irq;
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}
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return 0;
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destroy_eqs:
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while (i-- > 0)
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while (i-- > 0) {
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mana_gd_destroy_queue(gc, mdev->eqs[i]);
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mana_gd_put_gic(gc, false, (i + 1) % gc->num_msix_usable);
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}
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kfree(mdev->eqs);
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destroy_fatal_eq:
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mana_gd_destroy_queue(gc, mdev->fatal_err_eq);
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mana_gd_put_gic(gc, false, 0);
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return err;
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}
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void mana_ib_destroy_eqs(struct mana_ib_dev *mdev)
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{
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struct gdma_context *gc = mdev_to_gc(mdev);
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int i;
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int i, msi;
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mana_gd_destroy_queue(gc, mdev->fatal_err_eq);
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mana_gd_put_gic(gc, false, 0);
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for (i = 0; i < mdev->ib_dev.num_comp_vectors; i++)
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for (i = 0; i < mdev->ib_dev.num_comp_vectors; i++) {
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mana_gd_destroy_queue(gc, mdev->eqs[i]);
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msi = (i + 1) % gc->num_msix_usable;
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mana_gd_put_gic(gc, false, msi);
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}
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kfree(mdev->eqs);
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}
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@ -616,6 +616,7 @@ enum {
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#define GDMA_DRV_CAP_FLAG_1_HWC_TIMEOUT_RECONFIG BIT(3)
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#define GDMA_DRV_CAP_FLAG_1_GDMA_PAGES_4MB_1GB_2GB BIT(4)
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#define GDMA_DRV_CAP_FLAG_1_VARIABLE_INDIRECTION_TABLE_SUPPORT BIT(5)
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#define GDMA_DRV_CAP_FLAG_1_HW_VPORT_LINK_AWARE BIT(6)
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/* Driver can handle holes (zeros) in the device list */
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#define GDMA_DRV_CAP_FLAG_1_DEV_LIST_HOLES_SUP BIT(11)
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@ -632,7 +633,8 @@ enum {
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/* Driver detects stalled send queues and recovers them */
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#define GDMA_DRV_CAP_FLAG_1_HANDLE_STALL_SQ_RECOVERY BIT(18)
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#define GDMA_DRV_CAP_FLAG_1_HW_VPORT_LINK_AWARE BIT(6)
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/* Driver supports separate EQ/MSIs for each vPort */
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#define GDMA_DRV_CAP_FLAG_1_EQ_MSI_UNSHARE_MULTI_VPORT BIT(19)
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/* Driver supports linearizing the skb when num_sge exceeds hardware limit */
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#define GDMA_DRV_CAP_FLAG_1_SKB_LINEARIZE BIT(20)
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@ -660,7 +662,8 @@ enum {
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GDMA_DRV_CAP_FLAG_1_SKB_LINEARIZE | \
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GDMA_DRV_CAP_FLAG_1_PROBE_RECOVERY | \
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GDMA_DRV_CAP_FLAG_1_HANDLE_STALL_SQ_RECOVERY | \
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GDMA_DRV_CAP_FLAG_1_HWC_TIMEOUT_RECOVERY)
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GDMA_DRV_CAP_FLAG_1_HWC_TIMEOUT_RECOVERY | \
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GDMA_DRV_CAP_FLAG_1_EQ_MSI_UNSHARE_MULTI_VPORT)
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#define GDMA_DRV_CAP_FLAGS2 0
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