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arm64: dts: tesla: Change labels to lower-case

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DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250219085726.70824-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Krzysztof Kozlowski 2025-02-19 09:57:26 +01:00
parent 73fd2bb607
commit 056106b030
1 changed files with 13 additions and 13 deletions
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26
arch/arm64/boot/dts/tesla/fsd.dtsi
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@ -92,7 +92,7 @@ cpucl0_0: cpu@0 {
reg = <0x0 0x000>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -108,7 +108,7 @@ cpucl0_1: cpu@1 {
reg = <0x0 0x001>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -124,7 +124,7 @@ cpucl0_2: cpu@2 {
reg = <0x0 0x002>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -139,7 +139,7 @@ cpucl0_3: cpu@3 {
compatible = "arm,cortex-a72";
reg = <0x0 0x003>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -156,7 +156,7 @@ cpucl1_0: cpu@100 {
reg = <0x0 0x100>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -172,7 +172,7 @@ cpucl1_1: cpu@101 {
reg = <0x0 0x101>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -188,7 +188,7 @@ cpucl1_2: cpu@102 {
reg = <0x0 0x102>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -204,7 +204,7 @@ cpucl1_3: cpu@103 {
reg = <0x0 0x103>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -221,7 +221,7 @@ cpucl2_0: cpu@200 {
reg = <0x0 0x200>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -237,7 +237,7 @@ cpucl2_1: cpu@201 {
reg = <0x0 0x201>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -253,7 +253,7 @@ cpucl2_2: cpu@202 {
reg = <0x0 0x202>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -269,7 +269,7 @@ cpucl2_3: cpu@203 {
reg = <0x0 0x203>;
enable-method = "psci";
clock-frequency = <2400000000>;
cpu-idle-states = <&CPU_SLEEP>;
cpu-idle-states = <&cpu_sleep>;
i-cache-size = <0xc000>;
i-cache-line-size = <64>;
i-cache-sets = <256>;
@ -291,7 +291,7 @@ cpucl_l2: l2-cache0 {
idle-states {
entry-method = "psci";
CPU_SLEEP: cpu-sleep {
cpu_sleep: cpu-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
local-timer-stop;