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iommu: qcom: wire up fault handler

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This is quite useful for debugging.  Currently, always TERMINATE the
translation when the fault handler returns (since this is all we need
for debugging drivers).  But I expect the SVM work should eventually
let us do something more clever.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
This commit is contained in:
Rob Clark 2017-11-03 10:50:33 -06:00 committed by Alex Williamson
parent 2c40367cbf
commit 049541e178
1 changed files with 13 additions and 5 deletions
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18
drivers/iommu/qcom_iommu.c
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@ -66,6 +66,7 @@ struct qcom_iommu_ctx {
void __iomem *base; void __iomem *base;
bool secure_init; bool secure_init;
u8 asid; /* asid and ctx bank # are 1:1 */ u8 asid; /* asid and ctx bank # are 1:1 */
struct iommu_domain *domain;
}; };
struct qcom_iommu_domain { struct qcom_iommu_domain {
@ -194,12 +195,15 @@ static irqreturn_t qcom_iommu_fault(int irq, void *dev)
fsynr = iommu_readl(ctx, ARM_SMMU_CB_FSYNR0); fsynr = iommu_readl(ctx, ARM_SMMU_CB_FSYNR0);
iova = iommu_readq(ctx, ARM_SMMU_CB_FAR); iova = iommu_readq(ctx, ARM_SMMU_CB_FAR);
dev_err_ratelimited(ctx->dev, if (!report_iommu_fault(ctx->domain, ctx->dev, iova, 0)) {
"Unhandled context fault: fsr=0x%x, " dev_err_ratelimited(ctx->dev,
"iova=0x%016llx, fsynr=0x%x, cb=%d\n", "Unhandled context fault: fsr=0x%x, "
fsr, iova, fsynr, ctx->asid); "iova=0x%016llx, fsynr=0x%x, cb=%d\n",
fsr, iova, fsynr, ctx->asid);
}
iommu_writel(ctx, ARM_SMMU_CB_FSR, fsr); iommu_writel(ctx, ARM_SMMU_CB_FSR, fsr);
iommu_writel(ctx, ARM_SMMU_CB_RESUME, RESUME_TERMINATE);
return IRQ_HANDLED; return IRQ_HANDLED;
} }
@ -274,12 +278,14 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain,
/* SCTLR */ /* SCTLR */
reg = SCTLR_CFIE | SCTLR_CFRE | SCTLR_AFE | SCTLR_TRE | reg = SCTLR_CFIE | SCTLR_CFRE | SCTLR_AFE | SCTLR_TRE |
SCTLR_M | SCTLR_S1_ASIDPNE; SCTLR_M | SCTLR_S1_ASIDPNE | SCTLR_CFCFG;
if (IS_ENABLED(CONFIG_BIG_ENDIAN)) if (IS_ENABLED(CONFIG_BIG_ENDIAN))
reg |= SCTLR_E; reg |= SCTLR_E;
iommu_writel(ctx, ARM_SMMU_CB_SCTLR, reg); iommu_writel(ctx, ARM_SMMU_CB_SCTLR, reg);
ctx->domain = domain;
} }
mutex_unlock(&qcom_domain->init_mutex); mutex_unlock(&qcom_domain->init_mutex);
@ -395,6 +401,8 @@ static void qcom_iommu_detach_dev(struct iommu_domain *domain, struct device *de
/* Disable the context bank: */ /* Disable the context bank: */
iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0); iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);
ctx->domain = NULL;
} }
pm_runtime_put_sync(qcom_iommu->dev); pm_runtime_put_sync(qcom_iommu->dev);