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Renesas driver updates for v5.17
- Add a remoteproc API for controlling the Cortex-R7 boot address on
R-Car Gen3 SoCs,
- Consolidate product register handling.
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Merge tag 'renesas-drivers-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.17
- Add a remoteproc API for controlling the Cortex-R7 boot address on
R-Car Gen3 SoCs,
- Consolidate product register handling.
* tag 'renesas-drivers-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: Consolidate product register handling
soc: renesas: rcar-rst: Add support to set rproc boot address
Link: https://lore.kernel.org/r/cover.1638530612.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
0491871b63
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@ -13,15 +13,43 @@
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#define WDTRSTCR_RESET 0xA55A0002
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#define WDTRSTCR 0x0054
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#define CR7BAR 0x0070
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#define CR7BAREN BIT(4)
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#define CR7BAR_MASK 0xFFFC0000
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static void __iomem *rcar_rst_base;
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static u32 saved_mode __initdata;
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static int (*rcar_rst_set_rproc_boot_addr_func)(u64 boot_addr);
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static int rcar_rst_enable_wdt_reset(void __iomem *base)
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{
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iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
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return 0;
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}
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/*
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* Most of the R-Car Gen3 SoCs have an ARM Realtime Core.
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* Firmware boot address has to be set in CR7BAR before
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* starting the realtime core.
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* Boot address must be aligned on a 256k boundary.
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*/
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static int rcar_rst_set_gen3_rproc_boot_addr(u64 boot_addr)
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{
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if (boot_addr & ~(u64)CR7BAR_MASK) {
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pr_err("Invalid boot address got %llx\n", boot_addr);
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return -EINVAL;
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}
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iowrite32(boot_addr, rcar_rst_base + CR7BAR);
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iowrite32(boot_addr | CR7BAREN, rcar_rst_base + CR7BAR);
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return 0;
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}
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struct rst_config {
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unsigned int modemr; /* Mode Monitoring Register Offset */
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int (*configure)(void __iomem *base); /* Platform specific config */
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int (*set_rproc_boot_addr)(u64 boot_addr);
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};
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static const struct rst_config rcar_rst_gen1 __initconst = {
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@ -35,6 +63,7 @@ static const struct rst_config rcar_rst_gen2 __initconst = {
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static const struct rst_config rcar_rst_gen3 __initconst = {
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.modemr = 0x60,
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.set_rproc_boot_addr = rcar_rst_set_gen3_rproc_boot_addr,
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};
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static const struct rst_config rcar_rst_r8a779a0 __initconst = {
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@ -76,9 +105,6 @@ static const struct of_device_id rcar_rst_matches[] __initconst = {
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{ /* sentinel */ }
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};
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static void __iomem *rcar_rst_base __initdata;
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static u32 saved_mode __initdata;
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static int __init rcar_rst_init(void)
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{
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const struct of_device_id *match;
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@ -100,6 +126,8 @@ static int __init rcar_rst_init(void)
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rcar_rst_base = base;
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cfg = match->data;
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rcar_rst_set_rproc_boot_addr_func = cfg->set_rproc_boot_addr;
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saved_mode = ioread32(base + cfg->modemr);
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if (cfg->configure) {
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error = cfg->configure(base);
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@ -130,3 +158,12 @@ int __init rcar_rst_read_mode_pins(u32 *mode)
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*mode = saved_mode;
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return 0;
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}
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int rcar_rst_set_rproc_boot_addr(u64 boot_addr)
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{
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if (!rcar_rst_set_rproc_boot_addr_func)
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return -EIO;
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return rcar_rst_set_rproc_boot_addr_func(boot_addr);
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}
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EXPORT_SYMBOL_GPL(rcar_rst_set_rproc_boot_addr);
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@ -328,94 +328,92 @@ static const struct of_device_id renesas_socs[] __initconst = {
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{ /* sentinel */ }
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};
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struct renesas_id {
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unsigned int offset;
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u32 mask;
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};
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static const struct renesas_id id_bsid __initconst = {
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.offset = 0,
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.mask = 0xff0000,
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/*
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* TODO: Upper 4 bits of BSID are for chip version, but the format is
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* not known at this time so we don't know how to specify eshi and eslo
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*/
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};
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static const struct renesas_id id_rzg2l __initconst = {
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.offset = 0xa04,
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.mask = 0xfffffff,
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};
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static const struct renesas_id id_prr __initconst = {
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.offset = 0,
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.mask = 0xff00,
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};
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static const struct of_device_id renesas_ids[] __initconst = {
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{ .compatible = "renesas,bsid", .data = &id_bsid },
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{ .compatible = "renesas,r9a07g044-sysc", .data = &id_rzg2l },
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{ .compatible = "renesas,prr", .data = &id_prr },
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{ /* sentinel */ }
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};
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static int __init renesas_soc_init(void)
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{
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struct soc_device_attribute *soc_dev_attr;
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unsigned int product, eshi = 0, eslo;
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const struct renesas_family *family;
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const struct of_device_id *match;
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const struct renesas_soc *soc;
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const struct renesas_id *id;
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void __iomem *chipid = NULL;
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struct soc_device *soc_dev;
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struct device_node *np;
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unsigned int product, eshi = 0, eslo;
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const char *soc_id;
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match = of_match_node(renesas_socs, of_root);
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if (!match)
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return -ENODEV;
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soc_id = strchr(match->compatible, ',') + 1;
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soc = match->data;
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family = soc->family;
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np = of_find_compatible_node(NULL, NULL, "renesas,bsid");
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if (np) {
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chipid = of_iomap(np, 0);
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of_node_put(np);
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if (chipid) {
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product = readl(chipid);
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iounmap(chipid);
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if (soc->id && ((product >> 16) & 0xff) != soc->id) {
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pr_warn("SoC mismatch (product = 0x%x)\n",
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product);
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return -ENODEV;
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}
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}
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/*
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* TODO: Upper 4 bits of BSID are for chip version, but the
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* format is not known at this time so we don't know how to
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* specify eshi and eslo
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*/
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goto done;
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}
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np = of_find_compatible_node(NULL, NULL, "renesas,r9a07g044-sysc");
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if (np) {
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chipid = of_iomap(np, 0);
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of_node_put(np);
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if (chipid) {
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product = readl(chipid + 0x0a04);
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iounmap(chipid);
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if (soc->id && (product & 0xfffffff) != soc->id) {
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pr_warn("SoC mismatch (product = 0x%x)\n",
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product);
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return -ENODEV;
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}
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}
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goto done;
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}
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/* Try PRR first, then hardcoded fallback */
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np = of_find_compatible_node(NULL, NULL, "renesas,prr");
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np = of_find_matching_node_and_match(NULL, renesas_ids, &match);
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if (np) {
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id = match->data;
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chipid = of_iomap(np, 0);
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of_node_put(np);
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} else if (soc->id && family->reg) {
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/* Try hardcoded CCCR/PRR fallback */
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id = &id_prr;
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chipid = ioremap(family->reg, 4);
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}
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if (chipid) {
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product = readl(chipid);
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product = readl(chipid + id->offset);
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iounmap(chipid);
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/* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
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if ((product & 0x7fff) == 0x5210)
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product ^= 0x11;
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/* R-Car M3-W ES1.3 incorrectly identifies as ES2.1 */
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if ((product & 0x7fff) == 0x5211)
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product ^= 0x12;
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if (soc->id && ((product >> 8) & 0xff) != soc->id) {
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if (id == &id_prr) {
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/* R-Car M3-W ES1.1 incorrectly identifies as ES2.0 */
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if ((product & 0x7fff) == 0x5210)
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product ^= 0x11;
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/* R-Car M3-W ES1.3 incorrectly identifies as ES2.1 */
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if ((product & 0x7fff) == 0x5211)
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product ^= 0x12;
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eshi = ((product >> 4) & 0x0f) + 1;
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eslo = product & 0xf;
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}
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if (soc->id &&
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((product & id->mask) >> __ffs(id->mask)) != soc->id) {
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pr_warn("SoC mismatch (product = 0x%x)\n", product);
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return -ENODEV;
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}
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eshi = ((product >> 4) & 0x0f) + 1;
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eslo = product & 0xf;
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}
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done:
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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return -ENOMEM;
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@ -425,8 +423,7 @@ static int __init renesas_soc_init(void)
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of_node_put(np);
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soc_dev_attr->family = kstrdup_const(family->name, GFP_KERNEL);
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soc_dev_attr->soc_id = kstrdup_const(strchr(match->compatible, ',') + 1,
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GFP_KERNEL);
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soc_dev_attr->soc_id = kstrdup_const(soc_id, GFP_KERNEL);
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if (eshi)
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soc_dev_attr->revision = kasprintf(GFP_KERNEL, "ES%u.%u", eshi,
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eslo);
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@ -4,8 +4,10 @@
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#ifdef CONFIG_RST_RCAR
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int rcar_rst_read_mode_pins(u32 *mode);
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int rcar_rst_set_rproc_boot_addr(u64 boot_addr);
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#else
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static inline int rcar_rst_read_mode_pins(u32 *mode) { return -ENODEV; }
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static inline int rcar_rst_set_rproc_boot_addr(u64 boot_addr) { return -ENODEV; }
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#endif
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#endif /* __LINUX_SOC_RENESAS_RCAR_RST_H__ */
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