serial: 8250: split Moxa PCIe serial board support out of 8250_pci

The Moxa PCIe multiport serial boards are currently handled as part of
8250_pci.c. In preparation for adding Moxa-specific UART features and
optimizations, move the Moxa PCIe implementation into a dedicated
driver.

This introduces drivers/tty/serial/8250/8250_mxpcie.c and wires it up
via Kconfig and Makefile, while preserving the existing probe flow and
device IDs.

This change was suggested during earlier reviews by Andy Shevchenko [1][2].

No functional change intended.

Link: https://lore.kernel.org/all/ZmQovC6TbDpTb3c8@surfacebook.localdomain/ [1]
Link: https://lore.kernel.org/all/CAHp75VeDsVt0GQYUFxLM+obfmqXBPa3hM3YMsFbc26uzWZG-SQ@mail.gmail.com/ [2]
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://patch.msgid.link/20260731074820.735619-2-crescentcy.hsieh@moxa.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Crescent Hsieh 2026-07-31 15:48:07 +08:00 committed by Greg Kroah-Hartman
parent f56b8eef48
commit 0481a041e9
4 changed files with 302 additions and 242 deletions

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@ -0,0 +1,288 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Moxa PCIe multiport serial device driver
*
* Copyright (C) 2025 Moxa Inc. (support@moxa.com)
* Author: Crescent Hsieh <crescentcy.hsieh@moxa.com>
*/
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/device.h>
#include <linux/dev_printk.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <linux/8250_pci.h>
#include <linux/serial_8250.h>
#include "8250.h"
#define PCI_DEVICE_ID_MOXA_CP102E 0x1024
#define PCI_DEVICE_ID_MOXA_CP102EL 0x1025
#define PCI_DEVICE_ID_MOXA_CP102N 0x1027
#define PCI_DEVICE_ID_MOXA_CP104EL_A 0x1045
#define PCI_DEVICE_ID_MOXA_CP104N 0x1046
#define PCI_DEVICE_ID_MOXA_CP112N 0x1121
#define PCI_DEVICE_ID_MOXA_CP114EL 0x1144
#define PCI_DEVICE_ID_MOXA_CP114N 0x1145
#define PCI_DEVICE_ID_MOXA_CP116E_A_A 0x1160
#define PCI_DEVICE_ID_MOXA_CP116E_A_B 0x1161
#define PCI_DEVICE_ID_MOXA_CP118EL_A 0x1182
#define PCI_DEVICE_ID_MOXA_CP118E_A_I 0x1183
#define PCI_DEVICE_ID_MOXA_CP132EL 0x1322
#define PCI_DEVICE_ID_MOXA_CP132N 0x1323
#define PCI_DEVICE_ID_MOXA_CP134EL_A 0x1342
#define PCI_DEVICE_ID_MOXA_CP134N 0x1343
#define PCI_DEVICE_ID_MOXA_CP138E_A 0x1381
#define PCI_DEVICE_ID_MOXA_CP168EL_A 0x1683
/* Bits in PCI device ID encoding board capabilities */
#define MOXA_DEV_ID_IFACE_MASK GENMASK(11, 8) /* Supported serial interface */
#define MOXA_DEV_ID_NPORTS_MASK GENMASK(7, 4) /* Number of UART ports */
/* UART */
#define MOXA_PUART_BASE_BAUD 921600
#define MOXA_PUART_OFFSET 0x200
#define MOXA_GPIO_DIRECTION 0x09
#define MOXA_GPIO_OUTPUT 0x0A
#define MOXA_GPIO_PIN2 BIT(2)
#define MOXA_UIR_OFFSET 0x04
#define MOXA_UIR_RS232 0x00
#define MOXA_UIR_RS422 0x01
#define MOXA_UIR_RS485_4W 0x0B
#define MOXA_UIR_RS485_2W 0x0F
#define MOXA_EVEN_RS_MASK GENMASK(3, 0)
#define MOXA_ODD_RS_MASK GENMASK(7, 4)
struct mxpcie8250 {
unsigned int supp_rs;
unsigned int num_ports;
void __iomem *bar1_base; /* UART registers (MMIO) */
void __iomem *bar2_base; /* UIR / GPIO / CPLD (IO) */
int line[] __counted_by(num_ports);
};
enum {
MOXA_SUPP_RS232 = BIT(0),
MOXA_SUPP_RS422 = BIT(1),
MOXA_SUPP_RS485 = BIT(2),
};
static bool mxpcie8250_is_mini_pcie(unsigned short device)
{
if (device == PCI_DEVICE_ID_MOXA_CP102N ||
device == PCI_DEVICE_ID_MOXA_CP104N ||
device == PCI_DEVICE_ID_MOXA_CP112N ||
device == PCI_DEVICE_ID_MOXA_CP114N ||
device == PCI_DEVICE_ID_MOXA_CP132N ||
device == PCI_DEVICE_ID_MOXA_CP134N)
return true;
return false;
}
static unsigned int mxpcie8250_get_supp_rs(unsigned short device)
{
switch (device & MOXA_DEV_ID_IFACE_MASK) {
case 0x0000:
case 0x0600:
return MOXA_SUPP_RS232;
case 0x0100:
return MOXA_SUPP_RS232 | MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
case 0x0300:
return MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
default:
return 0;
}
}
static unsigned short mxpcie8250_get_nports(unsigned short device)
{
switch (device) {
case PCI_DEVICE_ID_MOXA_CP116E_A_A:
case PCI_DEVICE_ID_MOXA_CP116E_A_B:
return 8;
default:
return FIELD_GET(MOXA_DEV_ID_NPORTS_MASK, device);
}
}
static void mxpcie8250_set_interface(struct mxpcie8250 *priv,
unsigned int port_idx,
u8 mode)
{
void __iomem *uir_addr = priv->bar2_base + MOXA_UIR_OFFSET + port_idx / 2;
u8 cval;
cval = ioread8(uir_addr);
if (port_idx % 2)
FIELD_MODIFY(MOXA_ODD_RS_MASK, &cval, mode);
else
FIELD_MODIFY(MOXA_EVEN_RS_MASK, &cval, mode);
iowrite8(cval, uir_addr);
}
static void mxpcie8250_init_board(struct pci_dev *pdev, struct mxpcie8250 *priv)
{
void __iomem *bar2_base = priv->bar2_base;
unsigned short device = pdev->device;
u8 cval;
/* Initial terminator */
if (device == PCI_DEVICE_ID_MOXA_CP114EL ||
device == PCI_DEVICE_ID_MOXA_CP118EL_A) {
iowrite8(0xff, bar2_base + MOXA_GPIO_DIRECTION);
iowrite8(0x00, bar2_base + MOXA_GPIO_OUTPUT);
}
/*
* Enable hardware buffer to prevent break signal output when system boots up.
* This hardware buffer is only supported on Mini PCIe series.
*/
if (mxpcie8250_is_mini_pcie(device)) {
/* Set GPIO direction */
cval = ioread8(bar2_base + MOXA_GPIO_DIRECTION);
cval |= MOXA_GPIO_PIN2;
iowrite8(cval, bar2_base + MOXA_GPIO_DIRECTION);
/* Enable low GPIO */
cval = ioread8(bar2_base + MOXA_GPIO_OUTPUT);
cval &= ~MOXA_GPIO_PIN2;
iowrite8(cval, bar2_base + MOXA_GPIO_OUTPUT);
}
}
static void mxpcie8250_setup_port(struct pci_dev *pdev,
struct mxpcie8250 *priv,
struct uart_8250_port *up,
int idx)
{
unsigned short device = pdev->device;
int offset = idx * MOXA_PUART_OFFSET;
u8 init_mode = MOXA_UIR_RS232;
if (!(priv->supp_rs & MOXA_SUPP_RS232))
init_mode = MOXA_UIR_RS422;
mxpcie8250_set_interface(priv, idx, init_mode);
if (idx == 3 &&
(device == PCI_DEVICE_ID_MOXA_CP104EL_A ||
device == PCI_DEVICE_ID_MOXA_CP114EL ||
device == PCI_DEVICE_ID_MOXA_CP134EL_A))
offset = 7 * MOXA_PUART_OFFSET;
up->port.mapbase = pci_resource_start(pdev, FL_BASE1) + offset;
up->port.membase = pcim_iomap_table(pdev)[FL_BASE1] + offset;
}
static int mxpcie8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
struct device *dev = &pdev->dev;
struct uart_8250_port up = {};
struct mxpcie8250 *priv;
unsigned short device = pdev->device;
unsigned int num_ports;
int ret;
ret = pcim_enable_device(pdev);
if (ret)
return ret;
num_ports = mxpcie8250_get_nports(device);
priv = devm_kzalloc(dev, struct_size(priv, line, num_ports), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->num_ports = num_ports;
priv->supp_rs = mxpcie8250_get_supp_rs(device);
priv->bar1_base = pcim_iomap(pdev, FL_BASE1, 0);
if (!priv->bar1_base)
return -ENOMEM;
priv->bar2_base = pcim_iomap(pdev, FL_BASE2, 0);
if (!priv->bar2_base)
return -ENOMEM;
mxpcie8250_init_board(pdev, priv);
up.port.dev = dev;
up.port.irq = pdev->irq;
up.port.uartclk = MOXA_PUART_BASE_BAUD * 16;
up.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
up.port.iotype = UPIO_MEM;
up.port.iobase = 0;
up.port.regshift = 0;
for (unsigned int i = 0; i < num_ports; i++) {
mxpcie8250_setup_port(pdev, priv, &up, i);
dev_dbg(dev, "Setup PCI port: port %lx, irq %d, type %d\n",
up.port.iobase, up.port.irq, up.port.iotype);
priv->line[i] = serial8250_register_8250_port(&up);
if (priv->line[i] < 0) {
dev_err(dev,
"Couldn't register serial port %lx, irq %d, type %d, error %d\n",
up.port.iobase, up.port.irq,
up.port.iotype, priv->line[i]);
break;
}
}
pci_set_drvdata(pdev, priv);
return 0;
}
static void mxpcie8250_remove(struct pci_dev *pdev)
{
struct mxpcie8250 *priv = pci_get_drvdata(pdev);
for (unsigned int i = 0; i < priv->num_ports; i++)
serial8250_unregister_port(priv->line[i]);
}
static const struct pci_device_id mxpcie8250_pci_ids[] = {
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102E) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102EL) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102N) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL_A) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104N) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP112N) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114EL) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114N) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_A) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_B) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL_A) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118E_A_I) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132EL) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132N) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134EL_A) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134N) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP138E_A) },
{ PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL_A) },
{ }
};
MODULE_DEVICE_TABLE(pci, mxpcie8250_pci_ids);
static struct pci_driver mxpcie8250_pci_driver = {
.name = "8250_mxpcie",
.id_table = mxpcie8250_pci_ids,
.probe = mxpcie8250_probe,
.remove = mxpcie8250_remove,
};
module_pci_driver(mxpcie8250_pci_driver);
MODULE_AUTHOR("Moxa Inc.");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Moxa PCIe Multiport Serial Device Driver");

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@ -76,25 +76,6 @@
#define PCI_DEVICE_ID_WCHIC_CH384_4S 0x3470
#define PCI_DEVICE_ID_WCHIC_CH384_8S 0x3853
#define PCI_DEVICE_ID_MOXA_CP102E 0x1024
#define PCI_DEVICE_ID_MOXA_CP102EL 0x1025
#define PCI_DEVICE_ID_MOXA_CP102N 0x1027
#define PCI_DEVICE_ID_MOXA_CP104EL_A 0x1045
#define PCI_DEVICE_ID_MOXA_CP104N 0x1046
#define PCI_DEVICE_ID_MOXA_CP112N 0x1121
#define PCI_DEVICE_ID_MOXA_CP114EL 0x1144
#define PCI_DEVICE_ID_MOXA_CP114N 0x1145
#define PCI_DEVICE_ID_MOXA_CP116E_A_A 0x1160
#define PCI_DEVICE_ID_MOXA_CP116E_A_B 0x1161
#define PCI_DEVICE_ID_MOXA_CP118EL_A 0x1182
#define PCI_DEVICE_ID_MOXA_CP118E_A_I 0x1183
#define PCI_DEVICE_ID_MOXA_CP132EL 0x1322
#define PCI_DEVICE_ID_MOXA_CP132N 0x1323
#define PCI_DEVICE_ID_MOXA_CP134EL_A 0x1342
#define PCI_DEVICE_ID_MOXA_CP134N 0x1343
#define PCI_DEVICE_ID_MOXA_CP138E_A 0x1381
#define PCI_DEVICE_ID_MOXA_CP168EL_A 0x1683
#define PCI_DEVICE_ID_ADDIDATA_CPCI7500 0x7003
#define PCI_DEVICE_ID_ADDIDATA_CPCI7500_NG 0x7024
#define PCI_DEVICE_ID_ADDIDATA_CPCI7420_NG 0x7025
@ -2002,138 +1983,6 @@ pci_sunix_setup(struct serial_private *priv,
return setup_port(priv, port, bar, offset, 0);
}
#define MOXA_PUART_GPIO_EN 0x09
#define MOXA_PUART_GPIO_OUT 0x0A
#define MOXA_GPIO_PIN2 BIT(2)
#define MOXA_RS232 0x00
#define MOXA_RS422 0x01
#define MOXA_RS485_4W 0x0B
#define MOXA_RS485_2W 0x0F
#define MOXA_UIR_OFFSET 0x04
#define MOXA_EVEN_RS_MASK GENMASK(3, 0)
#define MOXA_ODD_RS_MASK GENMASK(7, 4)
enum {
MOXA_SUPP_RS232 = BIT(0),
MOXA_SUPP_RS422 = BIT(1),
MOXA_SUPP_RS485 = BIT(2),
};
static unsigned short moxa_get_nports(unsigned short device)
{
switch (device) {
case PCI_DEVICE_ID_MOXA_CP116E_A_A:
case PCI_DEVICE_ID_MOXA_CP116E_A_B:
return 8;
}
return FIELD_GET(0x00F0, device);
}
static bool pci_moxa_is_mini_pcie(unsigned short device)
{
if (device == PCI_DEVICE_ID_MOXA_CP102N ||
device == PCI_DEVICE_ID_MOXA_CP104N ||
device == PCI_DEVICE_ID_MOXA_CP112N ||
device == PCI_DEVICE_ID_MOXA_CP114N ||
device == PCI_DEVICE_ID_MOXA_CP132N ||
device == PCI_DEVICE_ID_MOXA_CP134N)
return true;
return false;
}
static unsigned int pci_moxa_supported_rs(struct pci_dev *dev)
{
switch (dev->device & 0x0F00) {
case 0x0000:
case 0x0600:
return MOXA_SUPP_RS232;
case 0x0100:
return MOXA_SUPP_RS232 | MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
case 0x0300:
return MOXA_SUPP_RS422 | MOXA_SUPP_RS485;
}
return 0;
}
static int pci_moxa_set_interface(const struct pci_dev *dev,
unsigned int port_idx,
u8 mode)
{
resource_size_t iobar_addr = pci_resource_start(dev, 2);
resource_size_t UIR_addr = iobar_addr + MOXA_UIR_OFFSET + port_idx / 2;
u8 val;
val = inb(UIR_addr);
if (port_idx % 2) {
val &= ~MOXA_ODD_RS_MASK;
val |= FIELD_PREP(MOXA_ODD_RS_MASK, mode);
} else {
val &= ~MOXA_EVEN_RS_MASK;
val |= FIELD_PREP(MOXA_EVEN_RS_MASK, mode);
}
outb(val, UIR_addr);
return 0;
}
static int pci_moxa_init(struct pci_dev *dev)
{
unsigned short device = dev->device;
resource_size_t iobar_addr = pci_resource_start(dev, 2);
unsigned int i, num_ports = moxa_get_nports(device);
u8 val, init_mode = MOXA_RS232;
if (!IS_ENABLED(CONFIG_HAS_IOPORT))
return serial_8250_warn_need_ioport(dev);
if (!(pci_moxa_supported_rs(dev) & MOXA_SUPP_RS232)) {
init_mode = MOXA_RS422;
}
for (i = 0; i < num_ports; ++i)
pci_moxa_set_interface(dev, i, init_mode);
/*
* Enable hardware buffer to prevent break signal output when system boots up.
* This hardware buffer is only supported on Mini PCIe series.
*/
if (pci_moxa_is_mini_pcie(device)) {
/* Set GPIO direction */
val = inb(iobar_addr + MOXA_PUART_GPIO_EN);
val |= MOXA_GPIO_PIN2;
outb(val, iobar_addr + MOXA_PUART_GPIO_EN);
/* Enable low GPIO */
val = inb(iobar_addr + MOXA_PUART_GPIO_OUT);
val &= ~MOXA_GPIO_PIN2;
outb(val, iobar_addr + MOXA_PUART_GPIO_OUT);
}
return num_ports;
}
static int
pci_moxa_setup(struct serial_private *priv,
const struct pciserial_board *board,
struct uart_8250_port *port, int idx)
{
unsigned int bar = FL_GET_BASE(board->flags);
int offset;
if (!IS_ENABLED(CONFIG_HAS_IOPORT))
return serial_8250_warn_need_ioport(priv->dev);
if (board->num_ports == 4 && idx == 3)
offset = 7 * board->uart_offset;
else
offset = idx * board->uart_offset;
return setup_port(priv, port, bar, offset, 0);
}
#define SB_OPTR_IMR0 0x0c /* Interrupt mask register, p0 to p7 */
static int pci_systembase_init(struct pci_dev *dev)
{
@ -2996,17 +2845,6 @@ static struct pci_serial_quirk pci_serial_quirks[] = {
.setup = pci_fintek_setup,
.init = pci_fintek_init,
},
/*
* MOXA
*/
{
.vendor = PCI_VENDOR_ID_MOXA,
.device = PCI_ANY_ID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
.init = pci_moxa_init,
.setup = pci_moxa_setup,
},
{
.vendor = 0x1c29,
.device = 0x1204,
@ -3225,9 +3063,6 @@ enum pci_board_num_t {
pbn_titan_2_4000000,
pbn_titan_4_4000000,
pbn_titan_8_4000000,
pbn_moxa_2,
pbn_moxa_4,
pbn_moxa_8,
};
/*
@ -4005,24 +3840,6 @@ static struct pciserial_board pci_boards[] = {
.uart_offset = 0x200,
.first_offset = 0x1000,
},
[pbn_moxa_2] = {
.flags = FL_BASE1,
.num_ports = 2,
.base_baud = 921600,
.uart_offset = 0x200,
},
[pbn_moxa_4] = {
.flags = FL_BASE1,
.num_ports = 4,
.base_baud = 921600,
.uart_offset = 0x200,
},
[pbn_moxa_8] = {
.flags = FL_BASE1,
.num_ports = 8,
.base_baud = 921600,
.uart_offset = 0x200,
},
};
#define REPORT_CONFIG(option) \
@ -4076,6 +3893,9 @@ static const struct pci_device_id blacklist[] = {
{ PCI_VDEVICE(PERICOM, PCI_ANY_ID), .driver_data = REPORT_8250_CONFIG(PERICOM), },
{ PCI_VDEVICE(ACCESSIO, PCI_ANY_ID), .driver_data = REPORT_8250_CONFIG(PERICOM), },
/* Moxa devices */
{ PCI_VDEVICE(MOXA, PCI_ANY_ID), REPORT_8250_CONFIG(MOXA), },
/* End of the black list */
{ }
};
@ -5950,65 +5770,6 @@ static const struct pci_device_id serial_pci_tbl[] = {
.driver_data = pbn_ni8430_4,
},
/*
* MOXA
*/
{
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102E),
.driver_data = pbn_moxa_2,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102EL),
.driver_data = pbn_moxa_2,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102N),
.driver_data = pbn_moxa_2,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL_A),
.driver_data = pbn_moxa_4,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104N),
.driver_data = pbn_moxa_4,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP112N),
.driver_data = pbn_moxa_2,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114EL),
.driver_data = pbn_moxa_4,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114N),
.driver_data = pbn_moxa_4,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_A),
.driver_data = pbn_moxa_8,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP116E_A_B),
.driver_data = pbn_moxa_8,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL_A),
.driver_data = pbn_moxa_8,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118E_A_I),
.driver_data = pbn_moxa_8,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132EL),
.driver_data = pbn_moxa_2,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132N),
.driver_data = pbn_moxa_2,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134EL_A),
.driver_data = pbn_moxa_4,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134N),
.driver_data = pbn_moxa_4,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP138E_A),
.driver_data = pbn_moxa_8,
}, {
PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL_A),
.driver_data = pbn_moxa_8,
},
/*
* ADDI-DATA GmbH communication cards <info@addi-data.com>
*/

View File

@ -141,6 +141,16 @@ config SERIAL_8250_EXAR
422x PCIe serial cards that are not covered by the more generic
SERIAL_8250_PCI option.
config SERIAL_8250_MOXA_PCIE
tristate "8250/16550 Moxa PCIe device support"
depends on SERIAL_8250 && PCI
default SERIAL_8250
help
Say Y here if you have a Moxa PCIe serial card.
To compile this driver as a module, choose M here: the
module will be called 8250_mxpcie.
config SERIAL_8250_HP300
tristate
depends on SERIAL_8250 && HP300

View File

@ -44,6 +44,7 @@ obj-$(CONFIG_SERIAL_8250_LPC18XX) += 8250_lpc18xx.o
obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o
obj-$(CONFIG_SERIAL_8250_MEN_MCB) += 8250_men_mcb.o
obj-$(CONFIG_SERIAL_8250_MID) += 8250_mid.o
obj-$(CONFIG_SERIAL_8250_MOXA_PCIE) += 8250_mxpcie.o
obj-$(CONFIG_SERIAL_8250_MT6577) += 8250_mtk.o
obj-$(CONFIG_SERIAL_8250_NI) += 8250_ni.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += 8250_of.o