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drm/i915/alpm: Move the check for PSR and Fixed RR in compute_config_late
With optimized guardband, we need to take into account LOBF requirements
via intel_alpm_lobf_min_guardband().
Currently, we set has_lobf based not only on whether it is supported, but
also on whether PSR/fixed RR are ON. Since these features can switch ON and
OFF seamlessly, this may cause LOBF to change, resulting in a change in
guardband requirements, and eventually to a full modeset.
To avoid this, always account for LOBF if it is supported, in the
encoder->compute_config() stage. For this, allow has_lobf to be set
irrespective of PSR/Fixed RR. Later, in the encoder->compute_config_late()
stage, use the PSR/Fixed RR checks to set has_lobf to the final value.
Move the PSR/Fixed RR checks from intel_alpm_lobf_compute_config() to
intel_alpm_lobf_compute_config_late(), where we already account for other
LOBF constraints.
v2: Reset has_lobf if psr or VRR is ON in
intel_alpm_lobf_compute_config_late(). (Animesh)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patch.msgid.link/20260616080627.2136659-1-ankit.k.nautiyal@intel.com
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@ -291,7 +291,9 @@ void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
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if (!crtc_state->has_lobf)
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return;
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if (!intel_alpm_lobf_is_window1_sufficient(crtc_state)) {
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if (crtc_state->has_psr ||
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!intel_vrr_is_fixed_rr(crtc_state) ||
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!intel_alpm_lobf_is_window1_sufficient(crtc_state)) {
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crtc_state->has_lobf = false;
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return;
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}
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@ -343,11 +345,7 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
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if (!intel_dp->as_sdp_supported)
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return;
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if (crtc_state->has_psr)
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return;
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if (!intel_vrr_always_use_vrr_tg(display) ||
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!intel_vrr_is_fixed_rr(crtc_state))
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if (!intel_vrr_always_use_vrr_tg(display))
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return;
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if (!(intel_alpm_aux_wake_supported(intel_dp) ||
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