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mips: dts: realtek: Fold rtl83xx into rtl838x
rtl83xx.dtsi was once (presumably) created as a base for both RTL838x and RTL839x SoCs. Both SoCs have a different CPU and the peripherals require different compatibles. Fold rtl83xx.dtsi into rtl838x.dtsi, currently only supporting RTL838x SoCs, and create the RTL839x base include later when required. Signed-off-by: Sander Vanheule <sander@svanheule.net> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -2,7 +2,6 @@
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/dts-v1/;
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#include "rtl83xx.dtsi"
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#include "rtl838x.dtsi"
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/ {
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@ -1,6 +1,14 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -18,4 +26,52 @@ baseclk: baseclk {
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#clock-cells = <0>;
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clock-frequency = <500000000>;
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};
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cpuintc: cpuintc {
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compatible = "mti,cpu-interrupt-controller";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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soc@18000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x18000000 0x10000>;
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uart0: serial@2000 {
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compatible = "ns16550a";
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reg = <0x2000 0x100>;
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clock-frequency = <200000000>;
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interrupt-parent = <&cpuintc>;
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interrupts = <31>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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uart1: serial@2100 {
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compatible = "ns16550a";
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reg = <0x2100 0x100>;
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clock-frequency = <200000000>;
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interrupt-parent = <&cpuintc>;
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interrupts = <30>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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};
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};
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@ -1,59 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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cpuintc: cpuintc {
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compatible = "mti,cpu-interrupt-controller";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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soc@18000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x18000000 0x10000>;
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uart0: serial@2000 {
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compatible = "ns16550a";
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reg = <0x2000 0x100>;
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clock-frequency = <200000000>;
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interrupt-parent = <&cpuintc>;
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interrupts = <31>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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uart1: serial@2100 {
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compatible = "ns16550a";
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reg = <0x2100 0x100>;
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clock-frequency = <200000000>;
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interrupt-parent = <&cpuintc>;
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interrupts = <30>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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};
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};
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