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arm64: dts: imx8qm-mek: add audio-codec cs42888 and related nodes

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Add audio-codec cs42888, enable esai0 and asrc0.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frank Li 2024-10-29 11:26:13 -04:00 committed by Shawn Guo
parent 3b003f5a7f
commit 0418189d27
1 changed files with 80 additions and 0 deletions
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80
arch/arm64/boot/dts/freescale/imx8qm-mek.dts
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@ -155,6 +155,13 @@ reg_usdhc2_vmmc: usdhc2-vmmc {
enable-active-high;
};
reg_audio: regulator-audio {
compatible = "regulator-fixed";
regulator-name = "cs42888_supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_fec2_supply: regulator-fec2-nvcc {
compatible = "regulator-fixed";
regulator-name = "fec2_nvcc";
@ -244,6 +251,26 @@ simple-audio-card,codec {
};
};
sound-cs42888 {
compatible = "fsl,imx-audio-cs42888";
model = "imx-cs42888";
audio-cpu = <&esai0>;
audio-codec = <&cs42888>;
audio-asrc = <&asrc0>;
audio-routing = "Line Out Jack", "AOUT1L",
"Line Out Jack", "AOUT1R",
"Line Out Jack", "AOUT2L",
"Line Out Jack", "AOUT2R",
"Line Out Jack", "AOUT3L",
"Line Out Jack", "AOUT3R",
"Line Out Jack", "AOUT4L",
"Line Out Jack", "AOUT4R",
"AIN1L", "Line In Jack",
"AIN1R", "Line In Jack",
"AIN2L", "Line In Jack",
"AIN2R", "Line In Jack";
};
sound-wm8960 {
compatible = "fsl,imx-audio-wm8960";
model = "wm8960-audio";
@ -322,12 +349,44 @@ pca6416: gpio@20 {
gpio-controller;
#gpio-cells = <2>;
};
cs42888: audio-codec@48 {
compatible = "cirrus,cs42888";
reg = <0x48>;
clocks = <&mclkout0_lpcg IMX_LPCG_CLK_0>;
clock-names = "mclk";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cs42888_reset>;
VA-supply = <&reg_audio>;
VD-supply = <&reg_audio>;
VLS-supply = <&reg_audio>;
VLC-supply = <&reg_audio>;
reset-gpios = <&lsio_gpio4 25 GPIO_ACTIVE_LOW>;
assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
<&mclkout0_lpcg IMX_LPCG_CLK_0>;
assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
};
};
&cm41_intmux {
status = "okay";
};
&esai0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esai0>;
assigned-clocks = <&acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
<&esai0_lpcg IMX_LPCG_CLK_4>;
assigned-clock-parents = <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>;
assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>;
status = "okay";
};
&hsio_phy {
fsl,hsio-cfg = "pciea-pcieb-sata";
fsl,refclk-pad-mode = "input";
@ -718,6 +777,12 @@ IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 0x0600004c
>;
};
pinctrl_cs42888_reset: cs42888_resetgrp {
fsl,pins = <
IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25 0x0600004c
>;
};
pinctrl_i2c0: i2c0grp {
fsl,pins = <
IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0x06000021
@ -752,6 +817,21 @@ IMX8QM_M41_I2C0_SCL_M41_I2C0_SCL 0x0600004c
>;
};
pinctrl_esai0: esai0grp {
fsl,pins = <
IMX8QM_ESAI0_FSR_AUD_ESAI0_FSR 0xc6000040
IMX8QM_ESAI0_FST_AUD_ESAI0_FST 0xc6000040
IMX8QM_ESAI0_SCKR_AUD_ESAI0_SCKR 0xc6000040
IMX8QM_ESAI0_SCKT_AUD_ESAI0_SCKT 0xc6000040
IMX8QM_ESAI0_TX0_AUD_ESAI0_TX0 0xc6000040
IMX8QM_ESAI0_TX1_AUD_ESAI0_TX1 0xc6000040
IMX8QM_ESAI0_TX2_RX3_AUD_ESAI0_TX2_RX3 0xc6000040
IMX8QM_ESAI0_TX3_RX2_AUD_ESAI0_TX3_RX2 0xc6000040
IMX8QM_ESAI0_TX4_RX1_AUD_ESAI0_TX4_RX1 0xc6000040
IMX8QM_ESAI0_TX5_RX0_AUD_ESAI0_TX5_RX0 0xc6000040
>;
};
pinctrl_fec1: fec1grp {
fsl,pins = <
IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020