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net/mlx5: DR, use the right action structs for STEv3

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Some actions in ConnectX-8 (STEv3) have different structure,
and they are handled separately in ste_ctx_v3.
This separate handling was missing two actions: INSERT_HDR
and REMOVE_HDR, which broke SWS for Linux Bridge.
This patch resolves the issue by introducing dedicated
callbacks for the insert and remove header functions,
with version-specific implementations for each STE variant.

Fixes: 4d617b5757 ("net/mlx5: DR, add support for ConnectX-8 steering")
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Itamar Gozlan <igozlan@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1741644104-97767-2-git-send-email-tariqt@nvidia.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Yevgeny Kliteynik 2025-03-11 00:01:39 +02:00 committed by Paolo Abeni
parent 1063ae0738
commit 03ebae1992
5 changed files with 79 additions and 25 deletions
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4
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h
View File

@ -210,6 +210,10 @@ struct mlx5dr_ste_ctx {
void (*set_encap_l3)(u8 *hw_ste_p, u8 *frst_s_action,
u8 *scnd_d_action, u32 reformat_id,
int size);
void (*set_insert_hdr)(u8 *hw_ste_p, u8 *d_action, u32 reformat_id,
u8 anchor, u8 offset, int size);
void (*set_remove_hdr)(u8 *hw_ste_p, u8 *s_action, u8 anchor,
u8 offset, int size);
/* Send */
void (*prepare_for_postsend)(u8 *hw_ste_p, u32 ste_size);
};

52
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c
View File

@ -266,10 +266,10 @@ void dr_ste_v1_set_encap(u8 *hw_ste_p, u8 *d_action, u32 reformat_id, int size)
dr_ste_v1_set_reparse(hw_ste_p);
}
static void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,
u32 reformat_id,
u8 anchor, u8 offset,
int size)
void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,
u32 reformat_id,
u8 anchor, u8 offset,
int size)
{
MLX5_SET(ste_double_action_insert_with_ptr_v1, d_action,
action_id, DR_STE_V1_ACTION_ID_INSERT_POINTER);
@ -286,9 +286,9 @@ static void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,
dr_ste_v1_set_reparse(hw_ste_p);
}
static void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,
u8 anchor, u8 offset,
int size)
void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,
u8 anchor, u8 offset,
int size)
{
MLX5_SET(ste_single_action_remove_header_size_v1, s_action,
action_id, DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE);
@ -584,11 +584,11 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx,
action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);
action_sz = DR_STE_ACTION_TRIPLE_SZ;
}
dr_ste_v1_set_insert_hdr(last_ste, action,
attr->reformat.id,
attr->reformat.param_0,
attr->reformat.param_1,
attr->reformat.size);
ste_ctx->set_insert_hdr(last_ste, action,
attr->reformat.id,
attr->reformat.param_0,
attr->reformat.param_1,
attr->reformat.size);
action_sz -= DR_STE_ACTION_DOUBLE_SZ;
action += DR_STE_ACTION_DOUBLE_SZ;
} else if (action_type_set[DR_ACTION_TYP_REMOVE_HDR]) {
@ -597,10 +597,10 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx,
action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);
action_sz = DR_STE_ACTION_TRIPLE_SZ;
}
dr_ste_v1_set_remove_hdr(last_ste, action,
attr->reformat.param_0,
attr->reformat.param_1,
attr->reformat.size);
ste_ctx->set_remove_hdr(last_ste, action,
attr->reformat.param_0,
attr->reformat.param_1,
attr->reformat.size);
action_sz -= DR_STE_ACTION_SINGLE_SZ;
action += DR_STE_ACTION_SINGLE_SZ;
}
@ -792,11 +792,11 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx,
action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);
action_sz = DR_STE_ACTION_TRIPLE_SZ;
}
dr_ste_v1_set_insert_hdr(last_ste, action,
attr->reformat.id,
attr->reformat.param_0,
attr->reformat.param_1,
attr->reformat.size);
ste_ctx->set_insert_hdr(last_ste, action,
attr->reformat.id,
attr->reformat.param_0,
attr->reformat.param_1,
attr->reformat.size);
action_sz -= DR_STE_ACTION_DOUBLE_SZ;
action += DR_STE_ACTION_DOUBLE_SZ;
allow_modify_hdr = false;
@ -808,10 +808,10 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx,
allow_modify_hdr = true;
allow_ctr = true;
}
dr_ste_v1_set_remove_hdr(last_ste, action,
attr->reformat.param_0,
attr->reformat.param_1,
attr->reformat.size);
ste_ctx->set_remove_hdr(last_ste, action,
attr->reformat.param_0,
attr->reformat.param_1,
attr->reformat.size);
action_sz -= DR_STE_ACTION_SINGLE_SZ;
action += DR_STE_ACTION_SINGLE_SZ;
}
@ -2200,6 +2200,8 @@ static struct mlx5dr_ste_ctx ste_ctx_v1 = {
.set_pop_vlan = &dr_ste_v1_set_pop_vlan,
.set_rx_decap = &dr_ste_v1_set_rx_decap,
.set_encap_l3 = &dr_ste_v1_set_encap_l3,
.set_insert_hdr = &dr_ste_v1_set_insert_hdr,
.set_remove_hdr = &dr_ste_v1_set_remove_hdr,
/* Send */
.prepare_for_postsend = &dr_ste_v1_prepare_for_postsend,
};

4
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h
View File

@ -156,6 +156,10 @@ void dr_ste_v1_set_pop_vlan(u8 *hw_ste_p, u8 *s_action, u8 vlans_num);
void dr_ste_v1_set_encap_l3(u8 *hw_ste_p, u8 *frst_s_action, u8 *scnd_d_action,
u32 reformat_id, int size);
void dr_ste_v1_set_rx_decap(u8 *hw_ste_p, u8 *s_action);
void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action, u32 reformat_id,
u8 anchor, u8 offset, int size);
void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action, u8 anchor,
u8 offset, int size);
void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_domain *dmn,
u8 *action_type_set, u32 actions_caps, u8 *last_ste,
struct mlx5dr_ste_actions_attr *attr, u32 *added_stes);

2
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c
View File

@ -69,6 +69,8 @@ static struct mlx5dr_ste_ctx ste_ctx_v2 = {
.set_pop_vlan = &dr_ste_v1_set_pop_vlan,
.set_rx_decap = &dr_ste_v1_set_rx_decap,
.set_encap_l3 = &dr_ste_v1_set_encap_l3,
.set_insert_hdr = &dr_ste_v1_set_insert_hdr,
.set_remove_hdr = &dr_ste_v1_set_remove_hdr,
/* Send */
.prepare_for_postsend = &dr_ste_v1_prepare_for_postsend,
};

42
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c
View File

@ -79,6 +79,46 @@ static void dr_ste_v3_set_rx_decap(u8 *hw_ste_p, u8 *s_action)
dr_ste_v1_set_reparse(hw_ste_p);
}
static void dr_ste_v3_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,
u32 reformat_id, u8 anchor,
u8 offset, int size)
{
MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,
action_id, DR_STE_V1_ACTION_ID_INSERT_POINTER);
MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,
start_anchor, anchor);
/* The hardware expects here size and offset in words (2 byte) */
MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,
size, size / 2);
MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,
start_offset, offset / 2);
MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,
pointer, reformat_id);
MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,
attributes, DR_STE_V1_ACTION_INSERT_PTR_ATTR_NONE);
dr_ste_v1_set_reparse(hw_ste_p);
}
static void dr_ste_v3_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,
u8 anchor, u8 offset, int size)
{
MLX5_SET(ste_single_action_remove_header_size_v3, s_action,
action_id, DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE);
MLX5_SET(ste_single_action_remove_header_size_v3, s_action,
start_anchor, anchor);
/* The hardware expects here size and offset in words (2 byte) */
MLX5_SET(ste_single_action_remove_header_size_v3, s_action,
remove_size, size / 2);
MLX5_SET(ste_single_action_remove_header_size_v3, s_action,
start_offset, offset / 2);
dr_ste_v1_set_reparse(hw_ste_p);
}
static int
dr_ste_v3_set_action_decap_l3_list(void *data, u32 data_sz,
u8 *hw_action, u32 hw_action_sz,
@ -211,6 +251,8 @@ static struct mlx5dr_ste_ctx ste_ctx_v3 = {
.set_pop_vlan = &dr_ste_v3_set_pop_vlan,
.set_rx_decap = &dr_ste_v3_set_rx_decap,
.set_encap_l3 = &dr_ste_v3_set_encap_l3,
.set_insert_hdr = &dr_ste_v3_set_insert_hdr,
.set_remove_hdr = &dr_ste_v3_set_remove_hdr,
/* Send */
.prepare_for_postsend = &dr_ste_v1_prepare_for_postsend,
};