soc: ti: k3-socinfo: Add information for AM62L SR1.1

The second silicon revision for the AM62L was mainly a ROM revision
and therefore this silicon revision is labeled SR1.1

Add a new decode array to properly identify this revision as SR1.1

Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://patch.msgid.link/20250908-62l-chipid-v1-1-9c7194148140@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Bryan Brattlof 2025-09-08 14:15:28 -05:00 committed by Nishanth Menon
parent 0fdd3240fe
commit 037e496038

View File

@ -66,6 +66,10 @@ static const char * const j721e_rev_string_map[] = {
"1.0", "1.1", "2.0",
};
static const char * const am62lx_rev_string_map[] = {
"1.0", "1.1",
};
static int
k3_chipinfo_partno_to_names(unsigned int partno,
struct soc_device_attribute *soc_dev_attr)
@ -92,6 +96,12 @@ k3_chipinfo_variant_to_sr(unsigned int partno, unsigned int variant,
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%s",
j721e_rev_string_map[variant]);
break;
case JTAG_ID_PARTNO_AM62LX:
if (variant >= ARRAY_SIZE(am62lx_rev_string_map))
goto err_unknown_variant;
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%s",
am62lx_rev_string_map[variant]);
break;
default:
variant++;
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "SR%x.0",