From 8c74b78d690380e87c479ea58d769c94bc743ed2 Mon Sep 17 00:00:00 2001 From: Asutosh Das Date: Mon, 7 Nov 2022 08:39:41 -0800 Subject: [PATCH] ufs-host: qcom: Disable h8 with clk gate and scale Work-around for hangs during bootup. No ramdumps/tools available to debug during BU. So, disable hibern8 during clock gating. This would let the clocks to be off thus allowing CxPC. Clock scaling needs SYS1CLK_1US_REG and DME_VS_CORE_CLK_CTRL.MAX_CORE_CLK_1US_CYCLES and PA_VS_CORE_CLK_40NS_CYCLES to be defined for 403Mhz. Disable clock scaling until values are determined. Change-Id: I702a561ecce627a8b00a676fc2e6118ce1ebc4a0 Signed-off-by: Asutosh Das --- drivers/ufs/host/ufs-qcom.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index eb7fbff7f8f2..856b24cad257 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -2075,11 +2075,8 @@ static void ufs_qcom_set_caps(struct ufs_hba *hba) if (!host->disable_lpm) { hba->caps |= UFSHCD_CAP_CLK_GATING | - UFSHCD_CAP_HIBERN8_WITH_CLK_GATING | - UFSHCD_CAP_CLK_SCALING | UFSHCD_CAP_AUTO_BKOPS_SUSPEND | - UFSHCD_CAP_RPM_AUTOSUSPEND; + UFSHCD_CAP_AUTO_BKOPS_SUSPEND; hba->caps |= UFSHCD_CAP_WB_EN; - hba->caps |= UFSHCD_CAP_AGGR_POWER_COLLAPSE; } hba->caps |= UFSHCD_CAP_CRYPTO;