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drm/xe/xe3: Apply Wa_16029380221 to media

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Apply Wa_16029380221 to Xe3p_LPM.

The Xe3p_LPM media page walker is hard-wired NonCoherent and cannot
observe CPU:WB cached page table data. Force page tables to CPU:WC
by clearing has_cached_pt when MEDIA_VERSION(3500) is detected.

v2: Simplify code comment to avoid duplicating information
    already present in xe_wa_oob.rules. (Gustavo)

Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
Link: https://patch.msgid.link/20260611162828.3879694-2-nitin.r.gote@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
This commit is contained in:
Nitin Gote 2026-06-11 21:58:29 +05:30 committed by Matt Roper
parent a889e9b06b
commit 02b7f6c326
2 changed files with 10 additions and 0 deletions
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9
drivers/gpu/drm/xe/xe_device.c
View File

@ -948,6 +948,15 @@ int xe_device_probe(struct xe_device *xe)
return err;
}
/*
* Wa_16029380221: The affected GT will always use non-coherent
* access to page tables, so we must do uncached writes from the
* CPU.
*/
for_each_gt(gt, xe, id)
if (XE_GT_WA(gt, 16029380221))
xe->info.has_cached_pt = false;
for_each_tile(tile, xe, id) {
err = xe_ggtt_init_early(tile->mem.ggtt);
if (err)

1
drivers/gpu/drm/xe/xe_wa_oob.rules
View File

@ -65,3 +65,4 @@
14025883347 MEDIA_VERSION_RANGE(1301, 3503)
GRAPHICS_VERSION_RANGE(2004, 3005)
16029380221 MEDIA_VERSION(3500)