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clk: microchip: core: allow driver to be compiled with COMPILE_TEST

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This driver currently only supports builds against a PIC32 target. To
avoid future breakage in the future, let's update the Kconfig and the
driver so that it can be built with CONFIG_COMPILE_TEST enabled.

Note that with the existing asm calls is not how I'd want to do this
today if this was a new driver, however I don't have access to this
hardware. To avoid any breakage, let's keep the existing behavior.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Brian Masney 2026-01-12 17:48:10 -05:00 committed by Thomas Bogendoerfer
parent 89ace07362
commit 026d70dcfe
2 changed files with 5 additions and 1 deletions
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2
drivers/clk/microchip/Kconfig
View File

@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
config COMMON_CLK_PIC32 config COMMON_CLK_PIC32
def_bool COMMON_CLK && MACH_PIC32 def_bool (COMMON_CLK && MACH_PIC32) || COMPILE_TEST
config MCHP_CLK_MPFS config MCHP_CLK_MPFS
bool "Clk driver for PolarFire SoC" bool "Clk driver for PolarFire SoC"

4
drivers/clk/microchip/clk-core.c
View File

@ -75,6 +75,7 @@
/* SoC specific clock needed during SPLL clock rate switch */ /* SoC specific clock needed during SPLL clock rate switch */
static struct clk_hw *pic32_sclk_hw; static struct clk_hw *pic32_sclk_hw;
#ifdef CONFIG_MATCH_PIC32
/* add instruction pipeline delay while CPU clock is in-transition. */ /* add instruction pipeline delay while CPU clock is in-transition. */
#define cpu_nop5() \ #define cpu_nop5() \
do { \ do { \
@ -84,6 +85,9 @@ do { \
__asm__ __volatile__("nop"); \ __asm__ __volatile__("nop"); \
__asm__ __volatile__("nop"); \ __asm__ __volatile__("nop"); \
} while (0) } while (0)
#else
#define cpu_nop5()
#endif
/* Perpheral bus clocks */ /* Perpheral bus clocks */
struct pic32_periph_clk { struct pic32_periph_clk {