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drm/amd/pm: Update SMUv13.0.6 PMFW headers

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Update PMFW interface headers to for new metrics table format and
throttling information.

v2: Added dummy definition for compilation error

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2023-04-03 11:38:17 +05:30 committed by Alex Deucher
parent cbb63eccc0
commit 023f4d6074
3 changed files with 35 additions and 11 deletions
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31
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_6.h
View File

@ -26,7 +26,7 @@
// *** IMPORTANT ***
// PMFW TEAM: Always increment the interface version if
// anything is changed in this file
#define SMU13_0_6_DRIVER_IF_VERSION 0x08042023
#define SMU13_0_6_DRIVER_IF_VERSION 0x08042024
//I2C Interface
#define NUM_I2C_CONTROLLERS 8
@ -125,11 +125,28 @@ typedef struct {
#define IH_INTERRUPT_ID_TO_DRIVER 0xFE
#define IH_INTERRUPT_CONTEXT_ID_THERMAL_THROTTLING 0x7
//thermal over-temp mask defines
#define THROTTLER_TEMP_CCD_BIT 5
#define THROTTLER_TEMP_XCD_BIT 6
#define THROTTLER_TEMP_HBM_BIT 7
#define THROTTLER_TEMP_AID_BIT 8
#define THROTTLER_VRHOT_BIT 9
//thermal over-temp mask defines for IH interrupt to host
#define THROTTLER_PROCHOT_BIT 0
#define THROTTLER_PPT_BIT 1
#define THROTTLER_THERMAL_SOCKET_BIT 2//AID, XCD, CCD throttling
#define THROTTLER_THERMAL_VR_BIT 3//VRHOT
#define THROTTLER_THERMAL_HBM_BIT 4
// These defines are used with the following messages:
// SMC_MSG_TransferTableDram2Smu
// SMC_MSG_TransferTableSmu2Dram
// #define TABLE_PPTABLE 0
// #define TABLE_AVFS_PSM_DEBUG 1
// #define TABLE_AVFS_FUSE_OVERRIDE 2
// #define TABLE_PMSTATUSLOG 3
// #define TABLE_SMU_METRICS 4
// #define TABLE_DRIVER_SMU_CONFIG 5
// #define TABLE_I2C_COMMANDS 6
// #define TABLE_COUNT 7
// // Table transfer status
// #define TABLE_TRANSFER_OK 0x0
// #define TABLE_TRANSFER_FAILED 0xFF
// #define TABLE_TRANSFER_PENDING 0xAB
#endif

13
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h
View File

@ -123,9 +123,9 @@ typedef enum {
VOLTAGE_GUARDBAND_COUNT
} GFX_GUARDBAND_e;
#define SMU_METRICS_TABLE_VERSION 0x3
#define SMU_METRICS_TABLE_VERSION 0x5
typedef struct {
typedef struct __attribute__((packed, aligned(4))) {
uint32_t AccumulationCounter;
//TEMPERATURE
@ -202,11 +202,16 @@ typedef struct {
// New Items at end to maintain driver compatibility
uint32_t GfxclkFrequency[8];
//PSNs
uint64_t PublicSerialNumber_AID[4];
uint64_t PublicSerialNumber_XCD[8];
uint64_t PublicSerialNumber_CCD[12];
} MetricsTable_t;
#define SMU_VF_METRICS_TABLE_VERSION 0x1
#define SMU_VF_METRICS_TABLE_VERSION 0x3
typedef struct {
typedef struct __attribute__((packed, aligned(4))) {
uint32_t AccumulationCounter;
uint32_t InstGfxclk_TargFreq;
uint64_t AccGfxclk_TargFreq;

2
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
View File

@ -82,6 +82,8 @@
#define smnPCIE_ESM_CTRL 0x111003D0
#define THROTTLER_TEMP_HBM_BIT 2
static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(TestMessage, PPSMC_MSG_TestMessage, 0),
MSG_MAP(GetSmuVersion, PPSMC_MSG_GetSmuVersion, 1),