From e31de4ed955566c5e6bd7ec3d1d4c9d22e723e8a Mon Sep 17 00:00:00 2001 From: Tanmay Shah Date: Fri, 12 Apr 2024 11:37:07 -0700 Subject: [PATCH 01/14] dts: zynqmp: add properties for TCM in remoteproc Add properties as per new bindings in zynqmp remoteproc node to represent TCM address and size. This patch also adds alternative remoteproc node to represent remoteproc cluster in split mode. By default lockstep mode is enabled and users should disable it before using split mode dts. Both device-tree nodes can't be used simultaneously one of them must be disabled. For zcu102-1.0 and zcu102-1.1 board remoteproc split mode dts node is enabled and lockstep mode dts is disabled. Signed-off-by: Tanmay Shah Reviewed-by: Mathieu Poirier Link: https://lore.kernel.org/r/20240412183708.4036007-4-tanmay.shah@amd.com Signed-off-by: Michal Simek --- .../boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 8 +++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 67 +++++++++++++++++-- 2 files changed, 70 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts index c8f71a1aec89..495ca94b45db 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts @@ -14,6 +14,14 @@ / { compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; }; +&rproc_split { + status = "okay"; +}; + +&rproc_lockstep { + status = "disabled"; +}; + &eeprom { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index d99830c9b85f..0b730f6eeef1 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -260,19 +260,76 @@ fpga_full: fpga-full { ranges; }; - remoteproc { + rproc_lockstep: remoteproc@ffe00000 { compatible = "xlnx,zynqmp-r5fss"; xlnx,cluster-mode = <1>; + xlnx,tcm-mode = <1>; - r5f-0 { + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x0 0x10000 0x0 0xffe10000 0x0 0x10000>, + <0x0 0x30000 0x0 0xffe30000 0x0 0x10000>; + + r5f@0 { compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_0>; + reg = <0x0 0x0 0x0 0x10000>, + <0x0 0x20000 0x0 0x10000>, + <0x0 0x10000 0x0 0x10000>, + <0x0 0x30000 0x0 0x10000>; + reg-names = "atcm0", "btcm0", "atcm1", "btcm1"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; memory-region = <&rproc_0_fw_image>; }; - r5f-1 { + r5f@1 { compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_1>; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm0", "btcm0"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>; + }; + }; + + rproc_split: remoteproc-split@ffe00000 { + status = "disabled"; + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <0>; + xlnx,tcm-mode = <0>; + + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>; + reg-names = "atcm0", "btcm0"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm0", "btcm0"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; memory-region = <&rproc_1_fw_image>; }; }; From fbce12d2899c4f19632d85df06c6d9377a565534 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Fri, 3 May 2024 11:34:22 -0400 Subject: [PATCH 02/14] arm64: zynqmp: Add coresight cpu debug support Add coresight debug support to the device tree. This can be useful when panicking, especially when a core is hung in EL3. Signed-off-by: Sean Anderson Link: https://lore.kernel.org/r/20240503153422.1958812-1-sean.anderson@linux.dev Signed-off-by: Michal Simek --- .../arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 16 +++++++++++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 28 +++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index dd4569e7bd95..60d1b1acf9a0 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -70,6 +70,22 @@ &cpu0 { clocks = <&zynqmp_clk ACPU>; }; +&cpu0_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu1_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu2_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu3_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + &fpd_dma_chan1 { clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 0b730f6eeef1..95796d6b5515 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -387,6 +387,34 @@ pmu@9000 { }; }; + cpu0_debug: debug@fec10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfec10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + }; + + cpu1_debug: debug@fed10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfed10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu1>; + }; + + cpu2_debug: debug@fee10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfee10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu2>; + }; + + cpu3_debug: debug@fef10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfef10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu3>; + }; + /* GDMA */ fpd_dma_chan1: dma-controller@fd500000 { status = "disabled"; From b2774d0292e875861c70ea75dc3baf88d4cec1ad Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:07 +0200 Subject: [PATCH 03/14] arm64: zynqmp: Align nvmem node with dt schema Use new soc-nvmem node name and swich to nvmem fixed layout. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/7796804c7c7dd8bb2c93bdfe028c22746a24fe54.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 95796d6b5515..cb74d1ffb825 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -207,13 +207,16 @@ zynqmp_power: power-management { mbox-names = "tx", "rx"; }; - nvmem-firmware { + soc-nvmem { compatible = "xlnx,zynqmp-nvmem-fw"; - #address-cells = <1>; - #size-cells = <1>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; - soc_revision: soc-revision@0 { - reg = <0x0 0x4>; + soc_revision: soc-revision@0 { + reg = <0x0 0x4>; + }; }; }; From 4e07d2281e2e847a36fa1c44b12681ae7bddf4e4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:08 +0200 Subject: [PATCH 04/14] arm64: zynqmp: Use fpga-region as node name Based on commit 85f838adad54 ("dt-bindings: fpga: Convert fpga-region binding to yaml") fpga/programmable logic should use fpga-region as node name that's why move to it. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/9133aed74a24ad5cd9af5a6d5aa7ee9a160f94ee.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index cb74d1ffb825..a43c64625402 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -255,7 +255,7 @@ timer { ; }; - fpga_full: fpga-full { + fpga_full: fpga-region { compatible = "fpga-region"; fpga-mgr = <&zynqmp_pcap>; #address-cells = <2>; From 0596963139717297fd2ae126d9727bd56cc51f15 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:09 +0200 Subject: [PATCH 05/14] arm64: zynqmp: Add missing description for efuses The commit 737c0c8d07b5 ("nvmem: zynqmp_nvmem: Add support to access efuse") added support for efuses that's why also describe them in DT. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/beb8002f8dae47ce6f38f7f961d024e65372b654.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 55 ++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index a43c64625402..635b67c06c4e 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -217,6 +217,61 @@ nvmem-layout { soc_revision: soc-revision@0 { reg = <0x0 0x4>; }; + /* efuse access */ + efuse_dna: efuse-dna@c { + reg = <0xc 0xc>; + }; + efuse_usr0: efuse-usr0@20 { + reg = <0x20 0x4>; + }; + efuse_usr1: efuse-usr1@24 { + reg = <0x24 0x4>; + }; + efuse_usr2: efuse-usr2@28 { + reg = <0x28 0x4>; + }; + efuse_usr3: efuse-usr3@2c { + reg = <0x2c 0x4>; + }; + efuse_usr4: efuse-usr4@30 { + reg = <0x30 0x4>; + }; + efuse_usr5: efuse-usr5@34 { + reg = <0x34 0x4>; + }; + efuse_usr6: efuse-usr6@38 { + reg = <0x38 0x4>; + }; + efuse_usr7: efuse-usr7@3c { + reg = <0x3c 0x4>; + }; + efuse_miscusr: efuse-miscusr@40 { + reg = <0x40 0x4>; + }; + efuse_chash: efuse-chash@50 { + reg = <0x50 0x4>; + }; + efuse_pufmisc: efuse-pufmisc@54 { + reg = <0x54 0x4>; + }; + efuse_sec: efuse-sec@58 { + reg = <0x58 0x4>; + }; + efuse_spkid: efuse-spkid@5c { + reg = <0x5c 0x4>; + }; + efuse_aeskey: efuse-aeskey@60 { + reg = <0x60 0x20>; + }; + efuse_ppk0hash: efuse-ppk0hash@a0 { + reg = <0xa0 0x30>; + }; + efuse_ppk1hash: efuse-ppk1hash@d0 { + reg = <0xd0 0x30>; + }; + efuse_pufuser: efuse-pufuser@100 { + reg = <0x100 0x7F>; + }; }; }; From f88eac0b68310f82c8d7dc6ab3903887fe9d3c28 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:10 +0200 Subject: [PATCH 06/14] arm64: zynqmp: Describe USB wakeup interrupt Describe usb wakeup interrupt. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/8c11ac7d73c822ee207cecd1445205f19fcaf004.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 635b67c06c4e..c70def3d464b 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -1084,10 +1084,11 @@ dwc3_0: usb@fe200000 { status = "disabled"; reg = <0x0 0xfe200000 0x0 0x40000>; interrupt-parent = <&gic>; - interrupt-names = "host", "peripheral", "otg"; + interrupt-names = "host", "peripheral", "otg", "wakeup"; interrupts = , , - ; + , + ; clock-names = "ref"; /* iommus = <&smmu 0x860>; */ snps,quirk-frame-length-adjustment = <0x20>; @@ -1115,10 +1116,11 @@ dwc3_1: usb@fe300000 { status = "disabled"; reg = <0x0 0xfe300000 0x0 0x40000>; interrupt-parent = <&gic>; - interrupt-names = "host", "peripheral", "otg"; + interrupt-names = "host", "peripheral", "otg", "wakeup"; interrupts = , , - ; + , + ; clock-names = "ref"; /* iommus = <&smmu 0x861>; */ snps,quirk-frame-length-adjustment = <0x20>; From 7ab06833e0787905a239e311cd27f92c40902636 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:11 +0200 Subject: [PATCH 07/14] arm64: zynqmp: Describe OCM controller Describe OCM controller which brings EDAC functionality. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/679736679fdf7897d68684295f6ed8256fb5f18e.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index c70def3d464b..f1094f553366 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -827,6 +827,13 @@ i2c1: i2c@ff030000 { power-domains = <&zynqmp_firmware PD_I2C_1>; }; + ocm: memory-controller@ff960000 { + compatible = "xlnx,zynqmp-ocmc-1.0"; + reg = <0x0 0xff960000 0x0 0x1000>; + interrupt-parent = <&gic>; + interrupts = ; + }; + pcie: pcie@fd0e0000 { compatible = "xlnx,nwl-pcie-2.11"; status = "disabled"; From a520fcceb9609823bf50818fd838cf22ee97341c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:12 +0200 Subject: [PATCH 08/14] arm64: zynqmp: Remove address/size-cells from ams node Remove unused address/size-cells properties without defining child. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/39f73999bbec0233264ce40f05c0885c46e423be.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index f1094f553366..b1b31dcf6291 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -1176,8 +1176,6 @@ ams_pl: ams-pl@400 { compatible = "xlnx,zynqmp-ams-pl"; status = "disabled"; reg = <0x400 0x400>; - #address-cells = <1>; - #size-cells = <0>; }; }; From a082e297fa18d96a41ccc308eb31675ffd3a47f8 Mon Sep 17 00:00:00 2001 From: Tejas Bhumkar Date: Mon, 27 May 2024 11:34:13 +0200 Subject: [PATCH 09/14] arm64: zynqmp: Disable Tri-state for SDIO Since the zynqmp pinctrl driver now includes support for the tri-state registers, ensure that the pins needing output-enable are correctly configured for SOMs. Currently, there is an issue with the detection of the MMC for the SOM kv260, resulting in the following error: ZynqMP> mmc dev 1 Card did not respond to voltage select! : -110 To address this problem, configure the SDIO pins for output-enable to enable MMC detection. Signed-off-by: Tejas Bhumkar Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/540f83f7d88b80441c9fa3d771dd7b000b0710a4.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 1 + arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso index d7535a77b45e..a09909a6f885 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso @@ -321,6 +321,7 @@ conf { slew-rate = ; power-source = ; bias-disable; + output-enable; }; conf-cd { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso index a7b8fffad499..b3b8875f8f7a 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso @@ -305,6 +305,7 @@ conf { slew-rate = ; power-source = ; bias-disable; + output-enable; }; conf-cd { From 894221b5a52a046f1d9469ec7145e5fc46fb0e63 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:14 +0200 Subject: [PATCH 10/14] arm64: zynqmp: Add compatible string for kv260 The commit dbcd27526e6a ("dt-bindings: soc: xilinx: Add support for KV260 CC") added description for kv260 kit and it should be also reflected in DTs. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/1e436f82182a92187f3892401664db2507482870.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 6 ++++++ arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso index a09909a6f885..0e5597e2fe10 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso @@ -22,6 +22,12 @@ /plugin/; &{/} { + compatible = "xlnx,zynqmp-sk-kv260-revA", + "xlnx,zynqmp-sk-kv260-revY", + "xlnx,zynqmp-sk-kv260-revZ", + "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; + model = "ZynqMP KV260 revA"; + si5332_0: si5332-0 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso index b3b8875f8f7a..fb37c06cfd69 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso @@ -17,6 +17,12 @@ /plugin/; &{/} { + compatible = "xlnx,zynqmp-sk-kv260-rev2", + "xlnx,zynqmp-sk-kv260-rev1", + "xlnx,zynqmp-sk-kv260-revB", + "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; + model = "ZynqMP KV260 revB"; + si5332_0: si5332-0 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; From 385cc4f769b44ab8ecf8502429d8f710e0f234c9 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:15 +0200 Subject: [PATCH 11/14] arm64: zynqmp: Add description for ina260 on kv260 The commit f7ab2d180e6a ("dt-bindings: hwmon: ina2xx: Describe ina260 chip"), commit f29996d0295e ("dt-bindings: hwmon: ina2xx: Describe #io-channel-cells property") and commit eea32fafadd3 ("dt-bindings: hwmon: ina2xx: Add label property") added description for ina260 that's why describe them on kv260 Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/944cba76ef5df932f1bebde6c5e64ec9d201356d.1716802450.git.michal.simek@amd.com --- .../boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso | 12 +++++++++++- .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 14 ++++++++++++-- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso index 0e5597e2fe10..95d16904d765 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso @@ -28,6 +28,11 @@ "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; model = "ZynqMP KV260 revA"; + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + si5332_0: si5332-0 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; @@ -74,7 +79,12 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - /* u14 - 0x40 - ina260 */ + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso index fb37c06cfd69..3ada04781950 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso @@ -23,6 +23,11 @@ "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; model = "ZynqMP KV260 revB"; + ina260-u14 { + compatible = "iio-hwmon"; + io-channels = <&u14 0>, <&u14 1>, <&u14 2>; + }; + si5332_0: si5332-0 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; @@ -69,8 +74,13 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - /* u14 - 0x40 - ina260 */ - /* u43 - 0x2d - usb5744 */ + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + /* u43 - 0x2d - USB hub */ /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ }; From 0d7835cf2d1ffceaa969e2106aa8d6a00ca343c0 Mon Sep 17 00:00:00 2001 From: Vishal Sagar Date: Mon, 27 May 2024 11:34:16 +0200 Subject: [PATCH 12/14] arm64: zynqmp: Describe DisplayPort connector for Kria Add a device tree node to describe the DisplayPort connector, and connect it to the DPSUB output. The patch was tested on kv260-revB/rev2. Signed-off-by: Vishal Sagar Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/4f69489c005719d280b8df97f3e82a5ce0cd9660.1716802450.git.michal.simek@amd.com --- .../boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso index 3ada04781950..a74d0ac7e07a 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso @@ -63,6 +63,18 @@ si5332_5: si5332-5 { /* u17 */ #clock-cells = <0>; clock-frequency = <27000000>; }; + + dpcon { + compatible = "dp-connector"; + label = "P11"; + type = "full-size"; + + port { + dpcon_in: endpoint { + remote-endpoint = <&dpsub_dp_out>; + }; + }; + }; }; &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ @@ -97,6 +109,14 @@ &zynqmp_dpsub { phy-names = "dp-phy0", "dp-phy1"; phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>; assigned-clock-rates = <27000000>, <25000000>, <300000000>; + + ports { + port@5 { + dpsub_dp_out: endpoint { + remote-endpoint = <&dpcon_in>; + }; + }; + }; }; &zynqmp_dpdma { From 89562ff4f0b8eac2915e8388ebdd76a4c2006eb8 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 27 May 2024 11:34:17 +0200 Subject: [PATCH 13/14] arm64: zynqmp: Add support for K26 rev2 boards Revision 2 is SW compatible with revision 1 but it is necessary to reflect it in model and compatible properties which are parsed by user space. Rev 2 has improved a power on boot reset and MIO34 shutdown glich improvement done via an additional filter in the GreenPak chip. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/458698666fdfcaaac70967d9f755422a480bed99.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 8 +++++--- arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts | 8 +++++--- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts index 51622896b1b1..2841be11ae66 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 /* - * dts file for Xilinx ZynqMP SM-K26 rev1/B/A + * dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A * * (C) Copyright 2020 - 2021, Xilinx, Inc. + * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc. * * Michal Simek */ @@ -17,8 +18,9 @@ #include / { - model = "ZynqMP SM-K26 Rev1/B/A"; - compatible = "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB", + model = "ZynqMP SM-K26 Rev2/1/B/A"; + compatible = "xlnx,zynqmp-sm-k26-rev2", + "xlnx,zynqmp-sm-k26-rev1", "xlnx,zynqmp-sm-k26-revB", "xlnx,zynqmp-sm-k26-revA", "xlnx,zynqmp-sm-k26", "xlnx,zynqmp"; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts index 85b0d1677240..b804abe89d1d 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-smk-k26-revA.dts @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 /* - * dts file for Xilinx ZynqMP SMK-K26 rev1/B/A + * dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A * * (C) Copyright 2020 - 2021, Xilinx, Inc. + * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc. * * Michal Simek */ @@ -10,8 +11,9 @@ #include "zynqmp-sm-k26-revA.dts" / { - model = "ZynqMP SMK-K26 Rev1/B/A"; - compatible = "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB", + model = "ZynqMP SMK-K26 Rev2/1/B/A"; + compatible = "xlnx,zynqmp-smk-k26-rev2", + "xlnx,zynqmp-smk-k26-rev1", "xlnx,zynqmp-smk-k26-revB", "xlnx,zynqmp-smk-k26-revA", "xlnx,zynqmp-smk-k26", "xlnx,zynqmp"; }; From f9508ef9976e8596f8a1139430ec439691f3337f Mon Sep 17 00:00:00 2001 From: Vishal Patel Date: Mon, 27 May 2024 11:34:18 +0200 Subject: [PATCH 14/14] arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property Add pwm-fan node to control fan through hwmon and change pwm-cells property to 3 to allow fancontrol utility to function correctly. Signed-off-by: Vishal Patel Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/ff6b4dbfc9bb1b53769ffbf7d0e932c7a8be7c08.1716802450.git.michal.simek@amd.com --- arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts index 2841be11ae66..86e6c4990560 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts @@ -103,12 +103,23 @@ ams { <&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>, <&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>; }; + + pwm-fan { + compatible = "pwm-fan"; + status = "okay"; + pwms = <&ttc0 2 40000 0>; + }; }; &modepin_gpio { label = "modepin"; }; +&ttc0 { + status = "okay"; + #pwm-cells = <3>; +}; + &uart1 { /* MIO36/MIO37 */ status = "okay"; };