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tools/nolibc: add support for SuperH
Add support for SuperH/"sh" to nolibc. Only sh4 is tested for now. The startup code is special: __nolibc_entrypoint_epilogue() calls __builtin_unreachable() which emits a call to abort(). To make this work a function prologue is generated to set up a GOT pointer which corrupts "sp". __builtin_unreachable() is necessary for __attribute__((noreturn)). Also depending on compiler flags (for example -fPIC) even more prologue is generated. Work around this by defining a nested function in asm. Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70216 Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Acked-by: Willy Tarreau <w@1wt.eu> Acked-by: Rob Landley <rob@landley.net> Acked-by: D. Jeff Dionne <jeff@coresemi.io> Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Link: https://lore.kernel.org/r/20250623-nolibc-sh-v2-3-0f5b4b303025@weissschuh.net
This commit is contained in:
Thomas Weißschuh
parent
358b2511d7
commit
02217ad447
162
tools/include/nolibc/arch-sh.h
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162
tools/include/nolibc/arch-sh.h
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@ -0,0 +1,162 @@
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/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* SuperH specific definitions for NOLIBC
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* Copyright (C) 2025 Thomas Weißschuh <linux@weissschuh.net>
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*/
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#ifndef _NOLIBC_ARCH_SH_H
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#define _NOLIBC_ARCH_SH_H
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#include "compiler.h"
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#include "crt.h"
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/*
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* Syscalls for SuperH:
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* - registers are 32bit wide
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* - syscall number is passed in r3
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* - arguments are in r4, r5, r6, r7, r0, r1, r2
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* - the system call is performed by calling trapa #31
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* - syscall return value is in r0
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*/
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#define my_syscall0(num) \
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({ \
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register long _num __asm__ ("r3") = (num); \
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register long _ret __asm__ ("r0"); \
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\
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__asm__ volatile ( \
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"trapa #31" \
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: "=r"(_ret) \
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: "r"(_num) \
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: "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall1(num, arg1) \
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({ \
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register long _num __asm__ ("r3") = (num); \
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register long _ret __asm__ ("r0"); \
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register long _arg1 __asm__ ("r4") = (long)(arg1); \
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\
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__asm__ volatile ( \
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"trapa #31" \
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: "=r"(_ret) \
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: "r"(_num), "r"(_arg1) \
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: "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall2(num, arg1, arg2) \
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({ \
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register long _num __asm__ ("r3") = (num); \
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register long _ret __asm__ ("r0"); \
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register long _arg1 __asm__ ("r4") = (long)(arg1); \
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register long _arg2 __asm__ ("r5") = (long)(arg2); \
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\
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__asm__ volatile ( \
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"trapa #31" \
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: "=r"(_ret) \
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: "r"(_num), "r"(_arg1), "r"(_arg2) \
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: "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall3(num, arg1, arg2, arg3) \
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({ \
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register long _num __asm__ ("r3") = (num); \
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register long _ret __asm__ ("r0"); \
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register long _arg1 __asm__ ("r4") = (long)(arg1); \
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register long _arg2 __asm__ ("r5") = (long)(arg2); \
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register long _arg3 __asm__ ("r6") = (long)(arg3); \
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\
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__asm__ volatile ( \
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"trapa #31" \
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: "=r"(_ret) \
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: "r"(_num), "r"(_arg1), "r"(_arg2), "r"(_arg3) \
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: "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall4(num, arg1, arg2, arg3, arg4) \
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({ \
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register long _num __asm__ ("r3") = (num); \
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register long _ret __asm__ ("r0"); \
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register long _arg1 __asm__ ("r4") = (long)(arg1); \
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register long _arg2 __asm__ ("r5") = (long)(arg2); \
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register long _arg3 __asm__ ("r6") = (long)(arg3); \
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register long _arg4 __asm__ ("r7") = (long)(arg4); \
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\
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__asm__ volatile ( \
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"trapa #31" \
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: "=r"(_ret) \
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: "r"(_num), "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4) \
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: "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__ ("r3") = (num); \
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register long _ret __asm__ ("r0"); \
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register long _arg1 __asm__ ("r4") = (long)(arg1); \
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register long _arg2 __asm__ ("r5") = (long)(arg2); \
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register long _arg3 __asm__ ("r6") = (long)(arg3); \
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register long _arg4 __asm__ ("r7") = (long)(arg4); \
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register long _arg5 __asm__ ("r0") = (long)(arg5); \
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\
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__asm__ volatile ( \
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"trapa #31" \
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: "=r"(_ret) \
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: "r"(_num), "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
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"r"(_arg5) \
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: "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
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({ \
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register long _num __asm__ ("r3") = (num); \
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register long _ret __asm__ ("r0"); \
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register long _arg1 __asm__ ("r4") = (long)(arg1); \
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register long _arg2 __asm__ ("r5") = (long)(arg2); \
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register long _arg3 __asm__ ("r6") = (long)(arg3); \
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register long _arg4 __asm__ ("r7") = (long)(arg4); \
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register long _arg5 __asm__ ("r0") = (long)(arg5); \
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register long _arg6 __asm__ ("r1") = (long)(arg6); \
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\
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__asm__ volatile ( \
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"trapa #31" \
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: "=r"(_ret) \
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: "r"(_num), "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
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"r"(_arg5), "r"(_arg6) \
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: "memory", "cc" \
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); \
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_ret; \
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})
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/* startup code */
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void _start_wrapper(void);
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void __attribute__((weak,noreturn)) __nolibc_entrypoint __no_stack_protector _start_wrapper(void)
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{
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__asm__ volatile (
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".global _start\n" /* The C function will have a prologue, */
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".type _start, @function\n" /* corrupting "sp" */
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".weak _start\n"
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"_start:\n"
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"mov sp, r4\n" /* save argc pointer to r4, as arg1 of _start_c */
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"bsr _start_c\n" /* transfer to c runtime */
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"nop\n" /* delay slot */
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".size _start, .-_start\n"
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);
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__nolibc_entrypoint_epilogue();
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}
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#endif /* _NOLIBC_ARCH_SH_H */
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@ -35,6 +35,8 @@
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#include "arch-sparc.h"
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#elif defined(__m68k__)
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#include "arch-m68k.h"
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#elif defined(__sh__)
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#include "arch-sh.h"
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#else
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#error Unsupported Architecture
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#endif
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@ -62,6 +62,7 @@ ARCH_riscv64 = riscv
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ARCH_s390x = s390
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ARCH_sparc32 = sparc
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ARCH_sparc64 = sparc
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ARCH_sh4 = sh
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ARCH := $(or $(ARCH_$(XARCH)),$(XARCH))
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# kernel image names by architecture
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@ -89,6 +90,7 @@ IMAGE_loongarch = arch/loongarch/boot/vmlinuz.efi
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IMAGE_sparc32 = arch/sparc/boot/image
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IMAGE_sparc64 = arch/sparc/boot/image
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IMAGE_m68k = vmlinux
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IMAGE_sh4 = arch/sh/boot/zImage
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IMAGE = $(objtree)/$(IMAGE_$(XARCH))
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IMAGE_NAME = $(notdir $(IMAGE))
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@ -117,11 +119,13 @@ DEFCONFIG_loongarch = defconfig
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DEFCONFIG_sparc32 = sparc32_defconfig
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DEFCONFIG_sparc64 = sparc64_defconfig
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DEFCONFIG_m68k = virt_defconfig
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DEFCONFIG_sh4 = rts7751r2dplus_defconfig
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DEFCONFIG = $(DEFCONFIG_$(XARCH))
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EXTRACONFIG_arm = -e CONFIG_NAMESPACES
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EXTRACONFIG_armthumb = -e CONFIG_NAMESPACES
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EXTRACONFIG_m68k = -e CONFIG_BLK_DEV_INITRD
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EXTRACONFIG_sh4 = -e CONFIG_BLK_DEV_INITRD -e CONFIG_CMDLINE_FROM_BOOTLOADER
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EXTRACONFIG = $(EXTRACONFIG_$(XARCH))
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# optional tests to run (default = all)
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@ -152,6 +156,7 @@ QEMU_ARCH_loongarch = loongarch64
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QEMU_ARCH_sparc32 = sparc
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QEMU_ARCH_sparc64 = sparc64
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QEMU_ARCH_m68k = m68k
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QEMU_ARCH_sh4 = sh4
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QEMU_ARCH = $(QEMU_ARCH_$(XARCH))
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QEMU_ARCH_USER_ppc64le = ppc64le
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@ -191,6 +196,7 @@ QEMU_ARGS_loongarch = -M virt -append "console=ttyS0,115200 panic=-1 $(TEST:%=N
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QEMU_ARGS_sparc32 = -M SS-5 -m 256M -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_sparc64 = -M sun4u -append "console=ttyS0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_m68k = -M virt -append "console=ttyGF0,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS_sh4 = -M r2d -serial file:/dev/stdout -append "console=ttySC1,115200 panic=-1 $(TEST:%=NOLIBC_TEST=%)"
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QEMU_ARGS = -m 1G $(QEMU_ARGS_$(XARCH)) $(QEMU_ARGS_BIOS) $(QEMU_ARGS_EXTRA)
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# OUTPUT is only set when run from the main makefile, otherwise
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@ -218,6 +224,7 @@ CFLAGS_mipsn32be = -EB -mabi=n32 -march=mips64r6
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CFLAGS_mips64le = -EL -mabi=64 -march=mips64r6
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CFLAGS_mips64be = -EB -mabi=64 -march=mips64r2
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CFLAGS_sparc32 = $(call cc-option,-m32)
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CFLAGS_sh4 = -ml -m4
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ifeq ($(origin XARCH),command line)
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CFLAGS_XARCH = $(CFLAGS_$(XARCH))
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endif
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@ -27,6 +27,7 @@ all_archs=(
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loongarch
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sparc32 sparc64
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m68k
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sh4
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)
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archs="${all_archs[@]}"
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@ -187,7 +188,7 @@ test_arch() {
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echo "Unsupported configuration"
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return
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fi
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if [ "$arch" = "m68k" ] && [ "$llvm" = "1" ]; then
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if [ "$arch" = "m68k" -o "$arch" = "sh4" ] && [ "$llvm" = "1" ]; then
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echo "Unsupported configuration"
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return
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fi
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