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perf/x86/intel: Validate the return value of intel_pmu_init_hybrid()

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The intel_pmu_init_hybrid() function allocates memory for the
x86_pmu.hybrid_pmu[] array. If this allocation fails under memory
pressure, hybrid PMU initialization will fail.

Currently, the caller does not check the return value of
intel_pmu_init_hybrid(). This can lead to a null-pointer dereference or
invalid memory access when attempting to use the uninitialized array,
potentially triggering a system panic.

Fix this by validating the return value of intel_pmu_init_hybrid().
Additionally, reset x86_pmu.num_hybrid_pmus to 0 on failure, and defer
intel_pmu_arch_lbr_init() until after hybrid PMU initialization
succeeds. This reordering avoids the need to explicitly destroy the
kmem cache if the memory allocation fails.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260616044654.3468742-6-dapeng1.mi@linux.intel.com
This commit is contained in:
Dapeng Mi 2026-06-16 12:46:51 +08:00 committed by Peter Zijlstra
parent e2b0575900
commit 01c153956b
1 changed files with 30 additions and 14 deletions
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44
arch/x86/events/intel/core.c
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@ -7679,8 +7679,10 @@ static __always_inline int intel_pmu_init_hybrid(enum hybrid_pmu_type pmus)
x86_pmu.num_hybrid_pmus = hweight_long(pmus_mask);
x86_pmu.hybrid_pmu = kzalloc_objs(struct x86_hybrid_pmu,
x86_pmu.num_hybrid_pmus);
if (!x86_pmu.hybrid_pmu)
if (!x86_pmu.hybrid_pmu) {
x86_pmu.num_hybrid_pmus = 0;
return -ENOMEM;
}
static_branch_enable(&perf_is_hybrid);
x86_pmu.filter = intel_pmu_filter;
@ -7863,14 +7865,14 @@ __init int intel_pmu_init(void)
struct attribute **td_attr = &empty_attrs;
struct attribute **mem_attr = &empty_attrs;
struct attribute **tsx_attr = &empty_attrs;
struct x86_hybrid_pmu *pmu;
unsigned int fixed_mask;
union cpuid10_edx edx;
union cpuid10_eax eax;
union cpuid10_ebx ebx;
unsigned int fixed_mask;
int version, i, ret;
bool pmem = false;
int version, i;
char *name;
struct x86_hybrid_pmu *pmu;
/* Architectural Perfmon was introduced starting with Core "Yonah" */
if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
@ -7940,9 +7942,6 @@ __init int intel_pmu_init(void)
x86_pmu.lbr_read = intel_pmu_lbr_read_32;
}
if (boot_cpu_has(X86_FEATURE_ARCH_LBR))
intel_pmu_arch_lbr_init();
intel_pebs_init();
x86_add_quirk(intel_arch_events_quirk); /* Install first, so it runs last */
@ -8540,7 +8539,9 @@ __init int intel_pmu_init(void)
*
* Initialize the common PerfMon capabilities here.
*/
intel_pmu_init_hybrid(hybrid_big_small);
ret = intel_pmu_init_hybrid(hybrid_big_small);
if (ret)
return ret;
x86_pmu.pebs_latency_data = grt_latency_data;
x86_pmu.get_event_constraints = adl_get_event_constraints;
@ -8598,7 +8599,9 @@ __init int intel_pmu_init(void)
case INTEL_METEORLAKE:
case INTEL_METEORLAKE_L:
case INTEL_ARROWLAKE_U:
intel_pmu_init_hybrid(hybrid_big_small);
ret = intel_pmu_init_hybrid(hybrid_big_small);
if (ret)
return ret;
x86_pmu.pebs_latency_data = cmt_latency_data;
x86_pmu.get_event_constraints = mtl_get_event_constraints;
@ -8629,7 +8632,9 @@ __init int intel_pmu_init(void)
pr_cont("Pantherlake Hybrid events, ");
name = "pantherlake_hybrid";
intel_pmu_init_hybrid(hybrid_big_small);
ret = intel_pmu_init_hybrid(hybrid_big_small);
if (ret)
return ret;
/* Initialize big core specific PerfMon capabilities.*/
pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX];
@ -8644,7 +8649,9 @@ __init int intel_pmu_init(void)
pr_cont("Arrowlake Hybrid events, ");
name = "arrowlake_hybrid";
intel_pmu_init_hybrid(hybrid_big_small);
ret = intel_pmu_init_hybrid(hybrid_big_small);
if (ret)
return ret;
/* Initialize big core specific PerfMon capabilities.*/
pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX];
@ -8661,7 +8668,9 @@ __init int intel_pmu_init(void)
pr_cont("Lunarlake Hybrid events, ");
name = "lunarlake_hybrid";
intel_pmu_init_hybrid(hybrid_big_small);
ret = intel_pmu_init_hybrid(hybrid_big_small);
if (ret)
return ret;
/* Initialize big core specific PerfMon capabilities.*/
pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX];
@ -8686,7 +8695,9 @@ __init int intel_pmu_init(void)
break;
case INTEL_ARROWLAKE_H:
intel_pmu_init_hybrid(hybrid_big_small_tiny);
ret = intel_pmu_init_hybrid(hybrid_big_small_tiny);
if (ret)
return ret;
x86_pmu.pebs_latency_data = arl_h_latency_data;
x86_pmu.get_event_constraints = arl_h_get_event_constraints;
@ -8721,7 +8732,9 @@ __init int intel_pmu_init(void)
case INTEL_NOVALAKE_L:
pr_cont("Novalake Hybrid events, ");
name = "novalake_hybrid";
intel_pmu_init_hybrid(hybrid_big_small);
ret = intel_pmu_init_hybrid(hybrid_big_small);
if (ret)
return ret;
x86_pmu.pebs_latency_data = nvl_latency_data;
x86_pmu.get_event_constraints = mtl_get_event_constraints;
@ -8828,6 +8841,9 @@ __init int intel_pmu_init(void)
pr_cont("AnyThread deprecated, ");
}
if (boot_cpu_has(X86_FEATURE_ARCH_LBR))
intel_pmu_arch_lbr_init();
intel_pmu_check_event_constraints_all(NULL);
/*