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arm64: dts: morello: Add CMN PMU
Although CMN-Skeena is mildly modified for the Morello hardware architecture, it still identifies itself as CMN-600 r3p1. Since there are also no documented changes to its PMU functionality, we can make the PMU accessible via the standard CMN-600 binding. In general, PMU registers are non-functional on CMN Fast Models, so this is only meaningful for the real SDP hardware. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Message-Id: <cbeb3832ded539c8c4616d49d3133078a34f88ad.1748350539.git.robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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@ -108,6 +108,13 @@ smmu_pcie: iommu@4f400000 {
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dma-coherent;
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};
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pmu@50000000 {
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compatible = "arm,cmn-600";
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reg = <0x0 0x50000000 0x0 0x4000000>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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arm,root-node = <0x804000>;
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};
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pcie_ctlr: pcie@28c0000000 {
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device_type = "pci";
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compatible = "pci-host-ecam-generic";
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