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drm/edid: parse HDMI 2.1 gaming (ALLM/VRR) capabilities from HF-VSDB
Parse the HDMI 2.1 gaming-related capabilities advertised in the HDMI Forum VSDB (HF-VSDB) and expose them through struct drm_hdmi_info so drivers can consume them. Add struct drm_hdmi_vrr_cap describing the sink's VRR capabilities: Fast VActive (Quick Frame Transport), Negative M VRR, Cinema VRR, MDelta, and the VRRmin/VRRmax range, together with a "supported" flag derived from that range. Add the fapa_start_location and allm (Auto Low Latency Mode) flags to struct drm_hdmi_info. drm_parse_hdmi_gaming_info() reads byte 8 of the HF-VSDB for the FAPA/ALLM/FVA/CNMVRR/CinemaVRR/MDelta flags and bytes 9-10 for VRRmin/VRRmax. Per HDMI 2.1, VRR is considered supported when VRRmin is within 1-48 and VRRmax is either 0 (maximum based on the video mode) or >= 100. It is invoked from drm_parse_hdmi_forum_scds(), and the parsed values are logged for debugging. Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Signed-off-by: Tomasz Pakuła <tomasz.pakula.oficjalny@gmail.com> Tested-by: Bernhard Berger <bernhard.berger@gmail.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Link: https://patch.msgid.link/20260730171754.704049-2-jerry.zuo@amd.com
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@ -6210,6 +6210,33 @@ static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
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hdmi->y420_dc_modes = dc_mask;
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}
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static void drm_parse_hdmi_gaming_info(struct drm_hdmi_info *hdmi, const u8 *db)
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{
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struct drm_hdmi_vrr_cap *vrr = &hdmi->vrr_cap;
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if (cea_db_payload_len(db) < 8)
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return;
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hdmi->fapa_start_location = db[8] & DRM_EDID_FAPA_START_LOCATION;
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hdmi->allm = db[8] & DRM_EDID_ALLM;
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vrr->fva = db[8] & DRM_EDID_FVA;
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vrr->cnmvrr = db[8] & DRM_EDID_CNMVRR;
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vrr->cinema_vrr = db[8] & DRM_EDID_CINEMA_VRR;
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vrr->mdelta = db[8] & DRM_EDID_MDELTA;
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if (cea_db_payload_len(db) < 9)
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return;
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vrr->vrr_min = db[9] & DRM_EDID_VRR_MIN_MASK;
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vrr->supported = (vrr->vrr_min > 0 && vrr->vrr_min <= 48);
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if (cea_db_payload_len(db) < 10)
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return;
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vrr->vrr_max = (db[9] & DRM_EDID_VRR_MAX_UPPER_MASK) << 2 | db[10];
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vrr->supported &= (vrr->vrr_max == 0 || vrr->vrr_max >= 100);
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}
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static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc,
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const u8 *hf_scds)
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{
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@ -6336,6 +6363,8 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
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drm_parse_ycbcr420_deep_color_info(connector, hf_scds);
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drm_parse_hdmi_gaming_info(&connector->display_info.hdmi, hf_scds);
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if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11]) {
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drm_parse_dsc_info(hdmi_dsc, hf_scds);
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dsc_support = true;
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@ -6345,6 +6374,19 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector,
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"[CONNECTOR:%d:%s] HF-VSDB: max TMDS clock: %d KHz, HDMI 2.1 support: %s, DSC 1.2 support: %s\n",
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connector->base.id, connector->name,
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max_tmds_clock, str_yes_no(max_frl_rate), str_yes_no(dsc_support));
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drm_dbg_kms(connector->dev,
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"[CONNECTOR:%d:%s] FAPA in blanking: %s, ALLM support: %s, Fast Vactive support: %s\n",
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connector->base.id, connector->name, str_yes_no(hdmi->fapa_start_location),
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str_yes_no(hdmi->allm), str_yes_no(hdmi->vrr_cap.fva));
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drm_dbg_kms(connector->dev,
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"[CONNECTOR:%d:%s] Negative M VRR support: %s, CinemaVRR support: %s, Mdelta: %d\n",
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connector->base.id, connector->name, str_yes_no(hdmi->vrr_cap.cnmvrr),
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str_yes_no(hdmi->vrr_cap.cinema_vrr), hdmi->vrr_cap.mdelta);
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drm_dbg_kms(connector->dev,
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"[CONNECTOR:%d:%s] VRRmin: %u, VRRmax: %u, VRR supported: %s\n",
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connector->base.id, connector->name, hdmi->vrr_cap.vrr_min,
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hdmi->vrr_cap.vrr_max, str_yes_no(hdmi->vrr_cap.supported));
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}
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static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
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@ -254,6 +254,44 @@ struct drm_scdc {
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struct drm_scrambling scrambling;
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};
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/**
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* struct drm_hdmi_vrr_cap - Information about VRR capabilities of a HDMI sink
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*
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* Describes the VRR support provided by HDMI 2.1 sink. The information is
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* fetched fom additional HFVSDB blocks defined for HDMI 2.1.
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*/
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struct drm_hdmi_vrr_cap {
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/** @fva: flag for Fast VActive (Quick Frame Transport) support */
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bool fva;
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/** @mcnmvrr: flag for Negative M VRR support */
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bool cnmvrr;
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/** @mcinema_vrr: flag for Cinema VRR support */
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bool cinema_vrr;
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/** @mdelta: flag for limited frame-to-frame compensation support */
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bool mdelta;
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/**
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* @vrr_min : minimum supported variable refresh rate in Hz.
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* Valid values only inide 1 - 48 range
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*/
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u16 vrr_min;
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/**
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* @vrr_max : maximum supported variable refresh rate in Hz (optional).
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* Valid values are either 0 (max based on video mode) or >= 100
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*/
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u16 vrr_max;
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/**
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* @supported: flag for vrr support based on checking for VRRmin and
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* VRRmax values having correct values.
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*/
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bool supported;
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};
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/**
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* struct drm_hdmi_dsc_cap - DSC capabilities of HDMI sink
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*
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@ -330,6 +368,15 @@ struct drm_hdmi_info {
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/** @max_lanes: supported by sink */
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u8 max_lanes;
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/** @fapa_start_location: flag for the FAPA in blanking support */
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bool fapa_start_location;
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/** @allm: flag for Auto Low Latency Mode support by sink */
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bool allm;
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/** @vrr_cap: VRR capabilities of the sink */
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struct drm_hdmi_vrr_cap vrr_cap;
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/** @dsc_cap: DSC capabilities of the sink */
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struct drm_hdmi_dsc_cap dsc_cap;
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};
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