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KVM: arm64: GICv3: Decouple ICH_HCR_EL2 programming from LRs
Not programming ICH_HCR_EL2 while no LRs are populated is a bit of an issue, as we otherwise don't see any maintenance interrupt when the guest interacts with the LRs. Decouple the two and always program the control register, even when we don't have to touch the LRs. Tested-by: Fuad Tabba <tabba@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Tested-by: Mark Brown <broonie@kernel.org> Link: https://msgid.link/20251120172540.2267180-13-maz@kernel.org Signed-off-by: Oliver Upton <oupton@kernel.org>
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@ -219,20 +219,12 @@ void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if)
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}
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}
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if (used_lrs || cpu_if->its_vpe.its_vm) {
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if (used_lrs) {
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int i;
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u32 elrsr;
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elrsr = read_gicreg(ICH_ELRSR_EL2);
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if (cpu_if->vgic_hcr & ICH_HCR_EL2_LRENPIE) {
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u64 val = read_gicreg(ICH_HCR_EL2);
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cpu_if->vgic_hcr &= ~ICH_HCR_EL2_EOIcount;
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cpu_if->vgic_hcr |= val & ICH_HCR_EL2_EOIcount;
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}
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write_gicreg(0, ICH_HCR_EL2);
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for (i = 0; i < used_lrs; i++) {
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if (elrsr & (1 << i))
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cpu_if->vgic_lr[i] &= ~ICH_LR_STATE;
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@ -242,6 +234,14 @@ void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if)
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__gic_v3_set_lr(0, i);
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}
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}
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if (cpu_if->vgic_hcr & ICH_HCR_EL2_LRENPIE) {
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u64 val = read_gicreg(ICH_HCR_EL2);
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cpu_if->vgic_hcr &= ~ICH_HCR_EL2_EOIcount;
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cpu_if->vgic_hcr |= val & ICH_HCR_EL2_EOIcount;
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}
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write_gicreg(0, ICH_HCR_EL2);
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}
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void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if)
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@ -249,12 +249,10 @@ void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if)
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u64 used_lrs = cpu_if->used_lrs;
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int i;
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if (used_lrs || cpu_if->its_vpe.its_vm) {
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write_gicreg(compute_ich_hcr(cpu_if), ICH_HCR_EL2);
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write_gicreg(compute_ich_hcr(cpu_if), ICH_HCR_EL2);
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for (i = 0; i < used_lrs; i++)
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__gic_v3_set_lr(cpu_if->vgic_lr[i], i);
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}
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for (i = 0; i < used_lrs; i++)
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__gic_v3_set_lr(cpu_if->vgic_lr[i], i);
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/*
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* Ensure that writes to the LRs, and on non-VHE systems ensure that
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