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arm64: dts: rk3399-box: compatible for rev2 board which cpu_b's vdd gpio is different

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Change-Id: Ie7088b526a1a384435136933a5f57c957e2bb5b0
Signed-off-by: buluess.li <buluess.li@rock-chips.com>
This commit is contained in:
buluess.li 2017-04-07 10:29:26 +08:00 committed by Huang, Tao
parent 19e1695794
commit 005290906c
3 changed files with 18 additions and 42 deletions
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20
arch/arm64/boot/dts/rockchip/rk3399-box-rev2-android-6.0.dts
View File

@ -49,6 +49,9 @@ / {
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&cpt_gpio>;
sdio0 {
sdio0_bus1: sdio0-bus1 {
rockchip,pins =
@ -106,10 +109,10 @@ fusb0_int: fusb0-int {
};
};
pmic {
vsel1_gpio: vsel1-gpio {
compat {
cpt_gpio: cpt-gpio {
rockchip,pins =
<1 18 RK_FUNC_GPIO &pcfg_pull_up>;
<1 18 RK_FUNC_GPIO &pcfg_output_low>;
};
};
};
@ -126,14 +129,3 @@ fusb0: fusb30x@22 {
status = "okay";
};
};
&vdd_cpu_b {
vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
fcs,suspend-voltage-selector = <0>;
};
&rockchip_suspend {
rockchip,power-ctrl =
<&gpio1 18 GPIO_ACTIVE_LOW>,
<&gpio1 14 GPIO_ACTIVE_HIGH>;
};

20
arch/arm64/boot/dts/rockchip/rk3399-box-rev2-disvr.dts
View File

@ -54,6 +54,9 @@ mpu6500_hid {
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&cpt_gpio>;
sdio0 {
sdio0_bus1: sdio0-bus1 {
rockchip,pins =
@ -111,10 +114,10 @@ fusb0_int: fusb0-int {
};
};
pmic {
vsel1_gpio: vsel1-gpio {
compat {
cpt_gpio: cpt-gpio {
rockchip,pins =
<1 18 RK_FUNC_GPIO &pcfg_pull_up>;
<1 18 RK_FUNC_GPIO &pcfg_output_low>;
};
};
};
@ -250,14 +253,3 @@ opp@816000000 {
status = "disabled";
};
};
&vdd_cpu_b {
vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
fcs,suspend-voltage-selector = <0>;
};
&rockchip_suspend {
rockchip,power-ctrl =
<&gpio1 18 GPIO_ACTIVE_LOW>,
<&gpio1 14 GPIO_ACTIVE_HIGH>;
};

20
arch/arm64/boot/dts/rockchip/rk3399-box-rev2.dts
View File

@ -49,6 +49,9 @@ / {
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&cpt_gpio>;
sdio0 {
sdio0_bus1: sdio0-bus1 {
rockchip,pins =
@ -106,10 +109,10 @@ fusb0_int: fusb0-int {
};
};
pmic {
vsel1_gpio: vsel1-gpio {
compat {
cpt_gpio: cpt-gpio {
rockchip,pins =
<1 18 RK_FUNC_GPIO &pcfg_pull_up>;
<1 18 RK_FUNC_GPIO &pcfg_output_low>;
};
};
};
@ -144,17 +147,6 @@ &route_hdmi {
status = "okay";
};
&vdd_cpu_b {
vsel-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
fcs,suspend-voltage-selector = <0>;
};
&rockchip_suspend {
rockchip,power-ctrl =
<&gpio1 18 GPIO_ACTIVE_LOW>,
<&gpio1 14 GPIO_ACTIVE_HIGH>;
};
&hdmi {
status = "okay";
rockchip,phy-table =