From 00425aeadd53c0273bcd9e71039ae44a33518538 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 16 Nov 2020 17:40:16 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568: Fix edp clock

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: If35282b9f0fc740f174e240803de6ebc2a049c66
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index f6ba477764e3..90c3edac565f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -1457,8 +1457,9 @@ edp: edp@fe0c0000 {
 		compatible = "rockchip,rk3568-edp";
 		reg = <0x0 0xfe0c0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru CLK_EDP_200M>, <&cru PCLK_EDP_CTRL>;
-		clock-names = "dp", "pclk";
+		clocks = <&pmucru XIN_OSC0_EDPPHY_G>, <&cru PCLK_EDP_CTRL>,
+			 <&cru CLK_EDP_200M>, <&cru HCLK_VO>;
+		clock-names = "dp", "pclk", "spdif", "hclk";
 		resets = <&cru SRST_EDP_24M>, <&cru SRST_P_EDP_CTRL>;
 		reset-names = "dp", "apb";
 		phys = <&edp_phy>;