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drm/i915/irq: add intel_display_irq_postinstall() to irq funcs

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Call the platform specific display irq postinstall hooks via
intel_display_irq_postinstall().

Relocate the gen11 HAS_DISPLAY() check to
intel_display_irq_postinstall(), as the funcs pointer won't be
initialized for no display.

v2:
- relocate HAS_DISPLAY() (Sashiko)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/65f1ad73628fb6dbdf6e782493eaecb1d61abaf7.1778688699.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Jani Nikula 2026-05-13 19:13:27 +03:00
parent 56f0919c43
commit 002a330f5b
4 changed files with 31 additions and 24 deletions
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30
drivers/gpu/drm/i915/display/intel_display_irq.c
View File

@ -1981,7 +1981,7 @@ u32 i9xx_display_irq_enable_mask(struct intel_display *display)
return enable_mask;
}
void i915_display_irq_postinstall(struct intel_display *display)
static void i915_display_irq_postinstall(struct intel_display *display)
{
/*
* Interrupt setup is already guaranteed to be single-threaded, this is
@ -1995,7 +1995,7 @@ void i915_display_irq_postinstall(struct intel_display *display)
i915_enable_asle_pipestat(display);
}
void i965_display_irq_postinstall(struct intel_display *display)
static void i965_display_irq_postinstall(struct intel_display *display)
{
/*
* Interrupt setup is already guaranteed to be single-threaded, this is
@ -2057,7 +2057,7 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
irq_init(display, VLV_IRQ_REGS, display->irq.vlv_imr_mask, enable_mask);
}
void vlv_display_irq_postinstall(struct intel_display *display)
static void vlv_display_irq_postinstall(struct intel_display *display)
{
spin_lock_irq(&display->irq.lock);
if (display->irq.vlv_display_irqs_enabled)
@ -2262,7 +2262,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
spin_unlock_irq(&display->irq.lock);
}
void ilk_de_irq_postinstall(struct intel_display *display)
static void ilk_de_irq_postinstall(struct intel_display *display)
{
u32 display_mask, extra_mask;
@ -2306,7 +2306,7 @@ void ilk_de_irq_postinstall(struct intel_display *display)
static void mtp_irq_postinstall(struct intel_display *display);
static void icp_irq_postinstall(struct intel_display *display);
void gen8_de_irq_postinstall(struct intel_display *display)
static void gen8_de_irq_postinstall(struct intel_display *display)
{
u32 de_pipe_masked = gen8_de_pipe_fault_mask(display) |
GEN8_PIPE_CDCLK_CRC_DONE;
@ -2433,11 +2433,8 @@ static void icp_irq_postinstall(struct intel_display *display)
irq_init(display, SDE_IRQ_REGS, ~mask, 0xffffffff);
}
void gen11_de_irq_postinstall(struct intel_display *display)
static void gen11_de_irq_postinstall(struct intel_display *display)
{
if (!HAS_DISPLAY(display))
return;
gen8_de_irq_postinstall(display);
intel_de_write(display, GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
@ -2445,30 +2442,37 @@ void gen11_de_irq_postinstall(struct intel_display *display)
struct intel_display_irq_funcs {
void (*reset)(struct intel_display *display);
void (*postinstall)(struct intel_display *display);
};
static const struct intel_display_irq_funcs gen11_display_irq_funcs = {
.reset = gen11_display_irq_reset,
.postinstall = gen11_de_irq_postinstall,
};
static const struct intel_display_irq_funcs gen8_display_irq_funcs = {
.reset = gen8_display_irq_reset,
.postinstall = gen8_de_irq_postinstall,
};
static const struct intel_display_irq_funcs vlv_display_irq_funcs = {
.reset = vlv_display_irq_reset,
.postinstall = vlv_display_irq_postinstall,
};
static const struct intel_display_irq_funcs ilk_display_irq_funcs = {
.reset = ilk_display_irq_reset,
.postinstall = ilk_de_irq_postinstall,
};
static const struct intel_display_irq_funcs i965_display_irq_funcs = {
.reset = i9xx_display_irq_reset,
.postinstall = i965_display_irq_postinstall,
};
static const struct intel_display_irq_funcs i915_display_irq_funcs = {
.reset = i9xx_display_irq_reset,
.postinstall = i915_display_irq_postinstall,
};
void intel_display_irq_reset(struct intel_display *display)
@ -2479,6 +2483,14 @@ void intel_display_irq_reset(struct intel_display *display)
display->irq.funcs->reset(display);
}
void intel_display_irq_postinstall(struct intel_display *display)
{
if (!HAS_DISPLAY(display))
return;
display->irq.funcs->postinstall(display);
}
void intel_display_irq_init(struct intel_display *display)
{
spin_lock_init(&display->irq.lock);

7
drivers/gpu/drm/i915/display/intel_display_irq.h
View File

@ -59,14 +59,9 @@ u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
void intel_display_irq_reset(struct intel_display *display);
void intel_display_irq_postinstall(struct intel_display *display);
u32 i9xx_display_irq_enable_mask(struct intel_display *display);
void i915_display_irq_postinstall(struct intel_display *display);
void i965_display_irq_postinstall(struct intel_display *display);
void vlv_display_irq_postinstall(struct intel_display *display);
void ilk_de_irq_postinstall(struct intel_display *display);
void gen8_de_irq_postinstall(struct intel_display *display);
void gen11_de_irq_postinstall(struct intel_display *display);
u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);

16
drivers/gpu/drm/i915/i915_irq.c
View File

@ -724,7 +724,7 @@ static void ilk_irq_postinstall(struct drm_i915_private *dev_priv)
gen5_gt_irq_postinstall(to_gt(dev_priv));
ilk_de_irq_postinstall(display);
intel_display_irq_postinstall(display);
}
static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
@ -733,7 +733,7 @@ static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
gen5_gt_irq_postinstall(to_gt(dev_priv));
vlv_display_irq_postinstall(display);
intel_display_irq_postinstall(display);
intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
intel_uncore_posting_read(&dev_priv->uncore, VLV_MASTER_IER);
@ -744,7 +744,7 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
struct intel_display *display = dev_priv->display;
gen8_gt_irq_postinstall(to_gt(dev_priv));
gen8_de_irq_postinstall(display);
intel_display_irq_postinstall(display);
gen8_master_intr_enable(intel_uncore_regs(&dev_priv->uncore));
}
@ -757,7 +757,7 @@ static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
u32 gu_misc_masked = GEN11_GU_MISC_GSE;
gen11_gt_irq_postinstall(gt);
gen11_de_irq_postinstall(display);
intel_display_irq_postinstall(display);
gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
@ -778,7 +778,7 @@ static void dg1_irq_postinstall(struct drm_i915_private *dev_priv)
gen2_irq_init(uncore, GEN11_GU_MISC_IRQ_REGS, ~gu_misc_masked, gu_misc_masked);
gen11_de_irq_postinstall(display);
intel_display_irq_postinstall(display);
dg1_master_intr_enable(intel_uncore_regs(uncore));
intel_uncore_posting_read(uncore, DG1_MSTR_TILE_INTR);
@ -790,7 +790,7 @@ static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv)
gen8_gt_irq_postinstall(to_gt(dev_priv));
vlv_display_irq_postinstall(display);
intel_display_irq_postinstall(display);
intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ);
@ -888,7 +888,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->gen2_imr_mask, enable_mask);
i915_display_irq_postinstall(display);
intel_display_irq_postinstall(display);
}
static irqreturn_t i915_irq_handler(int irq, void *arg)
@ -997,7 +997,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->gen2_imr_mask, enable_mask);
i965_display_irq_postinstall(display);
intel_display_irq_postinstall(display);
}
static irqreturn_t i965_irq_handler(int irq, void *arg)

2
drivers/gpu/drm/xe/display/xe_display.c
View File

@ -253,7 +253,7 @@ void xe_display_irq_postinstall(struct xe_device *xe)
if (!xe->info.probe_display)
return;
gen11_de_irq_postinstall(display);
intel_display_irq_postinstall(display);
}
static bool suspend_to_idle(void)